Skhynix Inc.

Innogrit Technologies Co., Ltd.

Chenrong Xiong

Fan Zhang

Aman Bhatia

Naveen Kumar

Yu Cai

Xuanxuan Lu

Meysam Asadi

Jie Chen

Haobo Wang

Abhiram Prabhakar

June Lee

HyungSeok Kim

Abhiram Prabahkar

David J Pignatelli

Yi-Min Lin

Kyoung Lae Cho

Yan Chen

Soo Jin Kim

Han Zhang

Zining Wu

Hongwei Duan

Jianqing Chen

Norton Chu

HongChich Chou

Jaesung Sim

Jianing Chen

Yanfang Liu

Jiangnan Xia

Disclosed herein are systems and methods that can avoid fruitless decoding iterations by terminating fruitless decoding iterations at an early stage. A method comprises: iteratively decoding a codeword by a decoder until a number of iterations at which a syndrome weight of the codeword exceeds a predetermined threshold. The method may further comprise: comparing the syndrome weight of the codeword with a decoder syndrome weight threshold for the decoder; in response to that the syndrome weight of the codeword is greater than or no less than the decoder syndrome weight threshold, terminating decoding of the codeword by the decoder.

Systems and methods for decoding codewords

Systems and methods are provided for determining optimal read reference voltages used for reading data in non-volatile storage devices. A method may include reading data stored in a non-volatile storage device using a group of soft read reference voltages, decoding the data and obtaining the number of ones and number of zeros for each of a plurality of zones delineated by the soft read reference voltages, determining that one of the soft read reference voltages is a boundary of a zone in which a comparison result of the number of ones compared to the number of zeros is greater than zero and a boundary of another zone in which a comparison result is less than zero and setting the soft read reference voltage adjusted by an adjustment as an optimal read reference voltage. The adjustment may be obtained based on the two comparison results.

Soft decoding correctable page assisted reference voltage tracking

Memory controllers and decoders of memory systems and methods for operating the same, which employ smart scheduling of commands to be processed to reduce overall execution time. A metric function is applied to determine or update the priority of each of the multiple commands in multiple queues based on expected execution time and expected wait time such that the smart scheduling scheme provides significant improvement in terms of quality-of-service (QoS) of the memory system.

Controller with smart scheduling and method of operating the controller

Systems and methods are provided for performing error recovery using LLRs generated from multi-read operations. A method may comprise selecting a set of decoding factors for a multi-read operation to read a non-volatile storage device multiple times. The set of decoding factors may include an aggregation mode for aggregating read results of multiple reads. The method may further comprise issuing a command to the non-volatile storage device to read user data according to the set of decoding factors, generating a plurality of Log-Likelihood Ratio (LLR) values using a mapping engine from a pre-selected set of LLR value magnitudes based on the set of decoding factors, obtaining an aggregated read result in accordance with the aggregation mode and obtaining an LLR value from the plurality of LLR values using the aggregated read result as an index.

Error recovery using adaptive LLR lookup table

A data processing system includes a storage medium, and a controller including a data processing block, configured to receive data from a host, transmit the received data to the storage medium, read data from the storage medium in response to a read request from the host, and decode the read data by the data processing block according to multiple decoding modes. The data processing block includes a first decoder and a second decoder, and is configured to manage the first decoder and the second decoder to run the decoding for the read data, and activate a fast decoding having shorter latency than a normal decoding after a fast decoding condition is satisfied.

Data storage device

Systems and methods are provided for estimating LLR values used for soft decoding of data stored in non-volatile storage devices. A method may include reading data stored in a non-volatile storage device using a group of soft read reference voltages, decoding the data read from the non-volatile storage device in a soft decoding process, obtaining a number of ones and a number of zeros for each zone of a plurality of zones delineated by the group of soft read reference voltages and obtaining a log-likelihood ratios (LLR) for each zone of the plurality of zones based on a ratio of the number of ones to the number of zeros in each zone.

Soft decoding correctable page assisted LLR estimation

Systems and methods are provided for concatenated error-correcting coding. An apparatus may include a Low-Density Parity-Check (LDPC) decoder configured to perform an iterative LDPC decoding process on bits of an LDPC codeword, a Bose-Chaudhuri-Hocquenghem (BCH) decoder coupled to the LDPC decoder and a BCH scheduler coupled to the LDPC decoder and the BCH decoder. The LDPC codeword may be generated by LDPC encoding a Bose-Chaudhuri-Hocquenghem (BCH) codeword and the BCH codeword may be generated by BCH encoding a data unit. The BCH scheduler may be configured to determine whether a triggering condition for the BCH decoder is met after each iteration of the iterative LDPC decoding process and activate the BCH decoder to operate on an intermediate decoding result of the LDPC decoder if the triggering condition for the BCH decoder is met.

Concatenated error correcting codes

Systems and methods are provided for tracking read reference voltages used for reading data in a non-volatile storage device. A method may comprise collecting pre-decoding state information for a read reference voltage by reading data stored in a non-volatile storage device using the read reference voltage, collecting post-decoding state information for the read reference voltage after decoding the data, generating a comparison of probability of state errors for the read reference voltage based on the pre-decoding state information and post-decoding state information, obtaining an adjustment amount to the read reference voltage based on the comparison of probability of state errors; and adjusting the read reference voltage by applying the adjustment amount to the read reference voltage to obtain an adjusted read reference voltage.

Reference voltage adjustment based on post-decoding and pre-decoding state information

Systems and methods are provided for concatenated error-correcting coding. An apparatus may include a Low-Density Parity-Check (LDPC) decoder configured to perform an iterative LDPC decoding process on bits of an LDPC codeword, a Bose&#x2014;Chaudhuri&#x2014;Hocquenghem (BCH) decoder coupled to the LDPC decoder and a BCH scheduler coupled to the LDPC decoder and the BCH decoder. The LDPC codeword may be generated by LDPC encoding a Bose&#x2014;Chaudhuri&#x2014;Hocquenghem (BCH) codeword and the BCH codeword may be generated by BCH encoding a data unit. The BCH scheduler may be configured to determine whether a triggering condition for the BCH decoder is met after each iteration of the iterative LDPC decoding process and activate the BCH decoder to operate on an intermediate decoding result of the LDPC decoder if the triggering condition for the BCH decoder is met.

Disclosed is a computer-implemented method for optimizing read thresholds of a memory device using a deep neural network engine, comprising reading, using a set of read threshold voltages applied to the memory device, data from the memory device under a first set of operating conditions that contribute to read errors in the memory device, producing a labeled training data set using the set of read threshold voltages under the first set of the operating conditions, determining, based on characteristics of the memory device, a number of layers, a size of each layer, and a number of input and output nodes of the deep neural network engine, training the deep neural network engine using the labeled training data set, and using the trained deep neural network engine to compute read thresholds voltage values under a second set of operating conditions.

Storage device performance optimization using deep learning

Systems and methods are provided for performing error recovery using LLRs generated from multi-read operations. A method may comprise selecting a set of decoding factors for a multi-read operation to read a non-volatile storage device multiple times. The set of decoding factors may include a total number of reads, an aggregation mode for aggregating read results of multiple reads, and whether the read results include soft data. The method may further comprise issuing a command to the non-volatile storage device to read user data according to the set of decoding factors, generating a plurality of Log-Likelihood Ratio (LLR) values using a mapping engine from a pre-selected set of LLR value magnitudes based on the set of decoding factors, obtaining an aggregated read result in accordance with the aggregation mode and obtaining an LLR value from the plurality of LLR values using the aggregated read result as an index.

Disclosed are methods, systems and devices for decoding data read from a memory device, including receiving noisy data from a first memory location included in a word line zone of the memory device, identifying the word line zone and a prior successful decoder parameter associated with the word line zone, decoding the noisy data using the prior successful decoder parameter used in a prior successful decoding with respect to a second memory location included in the same word line zone, determining whether the decoding based on the prior successful decoder parameter has succeeded, maintaining, upon a determination that the decoding has succeeded, the prior successful decoder parameter as a decoder parameter for the first memory location, and decoding, upon a determination that the decoding operation has failed, the noisy data read from the first memory location by using another decoder parameter selected from a set of predefined decoder parameters.

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Chenrong Xiong