Qualcomm Incorporated

Chengyue Yu

Zhen Ning Low

Hua Guan

Guoyong Guo

Jize Jiang

Jiwei Chen

Shamim Ahmed

Fan Yang

YuFei Pan

Yingjie Chen

Apparatus and techniques for an integrated circuit (IC) package to automatically detect, through an input/out pin, external component parameters and parasitics. An example IC package generally includes a pin for coupling to a component external to the IC package, and at least one of a resistance detector, an inductance detector, or a capacitance detector coupled to the pin, and configured to detect at least one of a resistance, an inductance, or a capacitance, respectively, of a lumped parameter model for the component external to the IC package. The resistance detector, inductance detector, or capacitance detector may also be configured to detect parasitics associated with at least one of the component, the pin, or a connection between the component and the pin.

Integrated circuit package with internal circuitry to detect external component parameters and parasitics

Certain aspects of the present disclosure generally relate to a connection terminal pattern and layout for a three-level buck regulator. One example electronic module generally includes a substrate, an integrated circuit (IC) package disposed on the substrate and comprising transistors of a three-level buck regulator, a capacitive element of the three-level buck regulator disposed on the substrate, and an inductive element of the three-level buck regulator disposed on the substrate. In certain aspects, the capacitive element and the inductive element may be disposed adjacent to different sides of the IC package.

Connection terminal pattern and layout for three-level buck regulator

Growing community of inventors

San Diego, CA, United States of America

Chengyue Yu