Jiangsu Advanced Memory Technology Co., Ltd.

Alto Memory Technology Corporation

Jiangsu Advanced Memory Semiconductor Co., Ltd.

Chengyu Xu

Jui-Jen Wu

Fan-Yi Jien

Junhua Zheng

Chien Chuan Wang

An operation method is applied to a memory device. The memory device includes a plurality of memory tiles. The operation method includes following steps: utilizing a first wear leveling process to perform an intra-tile wear leveling on the plurality of memory tiles by a processor; and utilizing a second wear leveling process to perform an inter-tile wear leveling on the plurality of memory tiles by the processor.

Memory device and operation method for performing wear leveling on a memory device

A memory device includes a memory array, write drivers and a controller. The memory array includes a plurality of memory units respectively arranged in a plurality of bit lines. The write drivers generate a plurality of write bit signals respectively inputted to the bit lines. The controller provides a voltage mode control signal and a current mode control signal. The controller is electrically coupled to the write drivers. Each of the write drivers generates a respective write bit signal of each of the write drivers according to the voltage mode control signal and the current mode control signal. When each of the memory units is in a set state, the controller outputs the voltage mode control signal and the current mode control signal to the write drivers. When each of the memory units is in a reset state, the controller outputs the voltage mode control signal to the write drivers.

Memory device and memory writing method

Growing community of inventors

Hsinchu County, Taiwan

Chengyu Xu