Google Inc.

Cheng-Yi Andrew Lin

Clemenz Lenard Portmann

Arnold Robert Feldman

Honglei Wu

Shahriar Rabii

Clemenz Portmann

An apparatus is described that includes an image sensor and a light source driver circuit integrated in a same semiconductor chip package. The image sensor includes visible light pixels and depth pixels. The depth pixels are to sense light generated with a light source drive signal. The light source drive signal is generated with the light source driver circuit.

Image sensor and light source driver integrated in a same semiconductor package

An apparatus is described that includes an image sensor and a light source driver circuit having configuration register space to receive information pertaining to a command to simulate a distance between a light source and an object that is different than an actual distance between the light source and the object.

Time-of-flight image sensor and light source driver having simulated distance capability

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, relating to testing three-dimensional imaging systems. In some implementations, a system includes a mount for a three-dimensional camera, a mount for a calibration target, and a rail to which the mount for the calibration target is coupled. The movement of the mount for the calibration target is constrained to the direction extending along the rail. The system includes a processing device having logic that receives a reading from a particular three-dimensional camera coupled to the mount for the three-dimensional camera. The reading includes a distance from the three-dimensional camera to a particular calibration target coupled to the mount for the calibration target. The logic receives a measurement of an actual distance from the particular three-dimensional camera to the particular calibration target. The logic then provides measurement characteristics of the particular three-dimensional camera.

Testing 3D imaging systems

A modulated signal based on a low-precision, fast startup oscillator is provided to a circuit with a high-precision, slow startup oscillator. The frequency of the modulated signal ranges around the characteristic or resonant frequency of the high precision oscillator without using feedback from the high precision oscillator circuit. An implementation can include one or more variable gain circuits that can be adjusted based on an amplitude threshold in relation to the output signal of the high precision oscillator circuit.

Oscillator startup

Systems and techniques are disclosed for configuring a circuit containing a one-pin crystal oscillator in connection with a general-purpose input/output (GPIO) pad. The GPIO pad may be connected to on-chip circuitry such as a one-pin crystal oscillator circuit and input and output buffers. The techniques disclosed herein utilize the GPIO pad such that the GPIO pad can be used as the crystal pin for a one-pin crystal oscillator circuit, or the GPIO pad can be used as a general input or general output. If the GPIO pad is operated as a general output, an on-chip signal can be driven to off-chip components, such as instrumentation, other integrated circuits, etc. If the GPIO pad is operated as a general input, external signals can be driven to on-chip components, such as clock buffers, counters, etc.

One-pin crystal oscillator driven through a general purpose input/output device

A crystal oscillator may be configured to limit crystal drive level in the crystal oscillator by clamping via a diode-resistor branch, voltage applied to a drain pad of the crystal oscillator. The crystal oscillator may incorporate Pierce crystal oscillator based implementation. The crystal oscillator may comprise an on-chip main branch, comprising at least one transistor element; an on-chip drain branch connecting the main branch to a drain pad; an on-chip gate branch connecting the main branch to a gate pad. The diode-resistor branch may be connected to the drain branch, and may comprise at least one diode and at least one resistor element. The at least one diode and the at least one resistor element may be connected in series in the diode-resistor branch. The clamped voltage may be applied from an off-chip drain node, through the drain pad.

Crystal oscillator with electrostatic discharge (ESD) compliant drive level limiter

A R2R ladder circuit implementation of a digital-to-analog convertor (DAC) may be configured to compensate for mismatch in each of a plurality of current sources in the R2R ladder circuit. The compensating of mismatch in each of the plurality of current sources may be achieved by adding one or more auxiliary current sources associated with each of the plurality of current sources, which may be used to provide pre-configured auxiliary current that would enable compensating for mismatch in current of an associated one of the plurality of current sources. For example, each of the plurality of current sources may have two auxiliary current sources, connected in parallel therewith, with one of two auxiliary current sources being switched to the positive-side and the other auxiliary current source being switched to the negative-side. The switching structure of the modified R2R ladder circuit may be implemented in any semiconductor technology (e.g., BiCMOS technology).

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Mountain View, CA, United States of America

Cheng-Yi Andrew Lin