Hughes Aircraft Company

Raytheon Company

Delco Electronics Corporation

United States of America As Represented by the Secretary of the Air Force

Rockwell International Corporation

Santa Barbara Research Center

Hughes Aircraft

Cheng P Wen

Chan-Shin Wu

Wah S Wong

Robert N Sato

Gregory S Mendolia

William D Gray

William David Higdon

Randy K Rolph

Timothy T Zielinski

Mario Siracusa

Cheng-Keng Pao

Joseph J Maieron

Chan S Wu

Peter Chu

Linda P B Katehi

William E Stanchina

David B Rensch

John J Wooldridge

Katherine J Herrick

Richard T Hennegan

Trang N Trinh

Jon J Gulick

Phillip A May

David C Wang

Wing Yau

Min-Wen Chiang

Kuo-Hsin Li

Gabriel M Rebeiz

Anthony A Immorlica, Jr

Cheng K Pao

Wah-Sang Wong

Douglas L Dunn

Michael R Cole

Liping D Hou

Stephen J Ferry

Robert F Wang

Arlene E Arthur

Reidar L Kuvas

Jen K Kung

Gerald H Nesbit

Thomas Ellis

Stephen Robertson

A radiation detector, particularly suited for the detection of long wavelength infrared radiation, employs a plurality of multiple quantum well (MQW) superlattices in a unitary stack. The superlattices are electrically connected in parallel, and current outputs are obtained from the parallel connection as an indication of the incident radiation. Electrical contact layers are provided on the opposite sides of each superlattice, with adjacent superlattices sharing a common contact layer. The number of quantum well/barrier layer periods per superlattice is preferably reduced to about 20-30 divided by the number of superlattices in the stack, as compared to a single-superlattice detector with about 20-30 periods. This allows a common bias voltage applied to the superlattices to be similarly reduced by a factor approximately equal to the number of superlattices in the stack. The reduction in superlattice thickness and bias voltage yields a higher external quantum efficiency, improved signal-to-noise ratio and lower power consumption. The detector can be implemented either as a single color system with similar superlattices, or as a multi-color system in which each superlattice is tuned to a different radiation waveband.

Stacked multiple quantum well superlattice infrared detector

A coplanar waveguide structure for use in constructing a monolithic microwave integrated circuit high power amplifier. The coplanar waveguide structure is a coplanar transmission line segment having more than two ground plane electrodes and a plurality of signal/dc current carrying electrodes. The current carrying electrodes are each separated from an adjacent ground plane electrode by a gap. The coplanar waveguide structure forms a shunt inductor for the monolithic microwave integrated circuit high power amplifier. The electrodes are shorted at one end to form the shunt inductor. A center ground plane electrode is preferably at least twice the width of the signal carrying electrode. The gaps between the signal carrying electrode and the ground electrodes are preferably at least one half the width of the signal carrying electrode to minimize current crowding.

High efficiency flip-chip monolithic microwave integrated circuit power amplifier

Structures and methods that provide for via transitions between opposite sides of a high resistivity silicon micro-machined membrane substrate. The via transitions provide ground-signal-ground interconnection between coplanar waveguides disposed on opposite sides of substrate. Adjacent via transitions are anisotropically etched from opposite surfaces of the substrate to form the via transitions. The ground-signal-ground configuration provides RF impedance matching at the via transition.

Via transitions for use as micromachined circuit interconnects

Structures and methods that provide for the vertical alignment of and electrical interconnection of MEMS tiles using metallized elastic spheres and precision pyramid shaped pits etched on the surface of silicon substrates. The methods of producing large area, multi-tile (substrate) structures permit fabrication of phased array antenna transmit/receive subsystems, for example, requiring precision, vertical electrical (DC and RF) interconnects between tiles and frames stacked on top of one another. Metallized, back-to-back, inverted pyramid shaped, vertical via structures are fabricated on high resistivity silicon tiles using micro-electronics mechanical system (MEMS) techniques. Slightly oversize, metallized, elastic spheres are squeezed between two inverted pyramid-shaped indentations to provide electrical conduction and accurate alignment between the substrates.

MEMS based tile assemblies and methods of fabrication

A millimeter-wave/microwave oscillator circuit and method of fabricating same are disclosed. A high Q-factor resonator is formed by disposing a transferred electron negative resistance device, such as a Gunn diode, or an IMPATT negative resistance device in a semi-circular cross-sectional shaped resonator cavity. The equivalent capacitance of the negative resistance diode can be designed to resonate with the equivalent series inductance for the resonator cavity by adjusting the dimensions of the cavity and the placement of the negative resistance device therein. Very low cost, compact and lightweight microwave and millimeter-wave integrated circuit power sources using negative resistance diodes can be batch manufactured.

High Q-factor oscillator circuit

A transition circuit is useful for coupling a first coplanar waveguide and a second coplanar waveguide disposed either on opposite sides of the same substrate or on different substrates. The first coplanar waveguide has a first signal conductor and a first pair of ground planes and the second coplanar waveguide has a second signal conductor and a second pair of ground planes. The transition circuit includes a signal interconnect coupling the first signal conductor to the second signal conductor and a pair of elongated interconnects coupling the first pair of ground planes to the second pair of ground planes. Each elongated interconnect is spaced from the signal interconnect.

Vertical interconnect circuit for coplanar waveguides

A multicell transistor for use in a circuit has an input ground plane for an input waveguide and an output ground plane for an output waveguide. The multicell transistor includes a gate electrode coupled to the input waveguide, a drain electrode coupled to the output waveguide, and a source electrode coupled to the input ground plane. An output ground strap spaced from the drain electrode couples the output ground plane to the source electrode. A pair of transmission lines are orthogonally connected to and extend from the gate electrode to form a pair of inductors for matching the impedances of the gate electrode and the input waveguide.

High power prematched MMIC transistor with improved ground potential

A monolithic flip chip microwave integrated circuit module formed using titanium coated copper circuitry and a processing method. A dam is formed on a substrate by forming a thin protective layer such as titanium or other metal on a copper layer formed on a surface of the substrate to which a monolithic microwave integrated circuit is to be attached. The protective layer is oxidized upon exposure to air. Vias or openings are then formed in the oxidized protective layer. Solder is disposed in the openings in the oxidized protective layer, and is confined to the openings while solder is reflowed to attach the integrated circuit to the substrate. The oxidized protective layer serves a dual function that provides both a solder dam and a protective coating for the underlying copper circuitry. Copper surfaces not covered by the oxidized protective layer may be environmentally protected by depositing a thin layer containing electroless plated nickel and electroless plated gold.

Flip chip microwave module and fabrication method

A thin film (at least one atomic layer to about 400 .ANG.) of nickel is electrolytically plated on top of electrolytically-plated gold electrodes in GaAs monolithic microwave integrated circuits (MMICs) without any additional photoresist masking step. The thin electrolytically-plated nickel film improves adhesion of a passivating dielectric layer (e.g., silicon dioxide, silicon nitride, and silicon oxynitride) formed on the electrolytically-plated gold electrodes. The electrolytically-plated nickel film can be removed locally to facilitate the fabrication of plated silver bumps (for off-chip electrical connections and thermal paths) on passivated flip chip MMICs.

Plated nickel-gold/dielectric interface for passivated MMICs

Mushroom-shaped, solder-capped, small-diameter (approximately 50 to 75 microns or less), metal bumps are used in the flip chip monolithic microwave integrated circuits (MMICs) attachment process to provide devices having improved solder volume uniformity. The operation of the MMIC device is extended to millimeter-wave frequencies. The self-alignment property of the solder reflow flip chip attachment process is retained, and enhanced by the solder cap that extends beyond the periphery of the metal bump. Solder flux instead of solder paste patterns are printed on the assembly substrate to facilitate flip chip attachment. The metal bumps comprise electroplated silver pillars having a first diameter capped with electroplated solder having a second diameter, where the second diameter is larger than the first diameter, and are formed using a multi-layer negative photoresist, multiple exposure processing sequence.

Flip chip monolithic microwave integrated circuit with mushroom-shaped,

A high power, flip-chip microwave monolithic integrated circuit (MMIC) assembly (30) has a high power microwave monolithic integrated circuit (MMIC) having a surface with an active area (72) in which heat is generated. The assembly also has a host substrate (34). A thermally conductive bump (51) formed over the surface of the MMIC has a first portion (51') in close proximity to and in thermal communication with the active area (72) of the MMIC and a second portion (51') which is in close proximity to and in thermal communication with the host substrate (34). The second portion (51') of the thermal bump (51) has a greater cross-sectional area than the first portion (51'). A multi-layer, multi-exposure method of manufacturing the improved thermal bump (51) includes several steps. A plating membrane (80) is formed on a surface of the MMIC (32). A first layer of negative photoresist is applied to the surface of the plating membrane (80), and is exposed with a first masked pattern of light. A second layer of negative photoresist is applied on top of the first layer of photoresist. The second layer of negative photoresist is exposed with a second masked pattern of light. Unexposed areas of the first and second layers of photoresist form a 'T' shape. The first and second layers of photoresist are developed with a photoresist developer, thereby leaving a 'T'-shaped via in the photoresist. An electrically and thermally conductive metal is plated onto the plating membrane and into the via to form a substantially 'T'-shaped bump (51), which is then attached to a host substrate. The resulting bump has greater cross-sectional area at the host substrate than at the MMIC (32).

Flip chip high power monolithic integrated circuit thermal bumps

Multiple solid precursor bubblers are used to alleviate channeling effects caused by high carrying gas flow rates to provide for deposition of indium-based epitaxial materials in high-capacity MOCVD reactor systems. Precracking of precursor materials that exhibit higher dissociation temperatures using heated manifolds or heated susceptor, and rotation of individual wafers in a multi-wafer reactor chamber enhance thickness uniformity, surface morphology and electronic properties of deposited epitaxial layers.

MOCVD reactor system for indium antimonide epitaxial material

Flip chip high power monolithic integrated circuit thermal bumps and

A multi-layer collector heterojunction transistor (10) provides for high power, high efficiency transistor amplifier operation, especially in the RF (radio frequency) range of operation. A larger band gap first collector layer (12), approximately 15% of the active collector region (11) thickness, is provided at the base-collector junction (13). A smaller band gap second collector layer (14) forms the remainder of the active collector region (11). The multi-layer collector structure provides higher reverse bias breakdown voltage and higher carrier mobility during relevant portions of the output signal swing. A lower saturation voltage limit, or 'knee' voltage, is provided at the operating points where linear operating regions transition to saturation operating regions as depicted in the output voltage-current (I-V) characteristic curves. The magnitude of the output signal swing of an amplifier may be increased, providing higher power amplification with greater power efficiency. The power supply voltage for the amplifier may be increased, providing for the use of a smaller, lighter power supply.

Multi-layer collector heterojunction transistor

An improved multiquantum well superlattice photodetector (10) for detecting long wavelength infrared radiation. Electron transport in a first excited energy state is enhanced in barrier layers (20) of the superlattice (16) by lowering the potential energy barriers of the barrier layers (20) to a predetermined level below the first excited energy state. The tunneling component of the dark current in a multiquantum well photodetector (10) may be substantially eliminated by placing a blocking layer (22) at one end of the superlattice (16). The thickness of the blocking layer (22) is also substantially greater than that of the barrier layers (20) of the superlattice (16) to prevent charge carriers which tunnel through the superlattice (16) from reaching the collector contact. The blocking layer (22) also has a potential energy barrier having a height at a level higher than that of the barrier layers (20) of the superlattice (16).

Dark current-free multiquantum well superlattice infrared detector

Growing community of inventors

Mission Viejo, CA, United States of America

Cheng P Wen