Tech Semiconductor Singapore Pte Ltd

Cheng Lin

Nurulhuda Binte Jumahri

Methods and systems for wafer lot ordering using including estimation of allowable queue time based on utilization loss and rework percentage have been achieved. The method invented comprises steps of ranking lots, allocating equipment to the exit step of queue time, calculating and determining the optimal allowable queue time based on utilization loss and rework percentage, calculating the next available time for equipment, calculating earliest release time, and releasing lot/batch and pre-assign it to the equipment at exit step. The present invention can be applied to other manufacturing lines than semiconductor manufacturing.

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Singapore, Singapore

Cheng Lin