Au Optronics Corporation

Cheng-Kuang Wang

Chun-Da Tu

A display device includes a plurality of pixel electrodes, a plurality of gate lines, and a plurality of data lines. The pixel electrodes arranged in a matrix include a plurality of first color pixel electrodes. The gate lines are configured to sequentially provide a plurality of gate signals to the pixel electrodes in a plurality of line times. The data lines are configured to provide a plurality of the first data voltages and a plurality of the second data voltages to the first color pixel electrodes. The polarity of the first data voltages is opposite to the polarity of the second data voltages in the same frame. In each of the line times, the number of the first color pixel electrodes receiving the first data voltage is substantially equal to the number of the first color pixel electrodes receiving the second data voltages.

Display device and driving method thereof

A display apparatus including at least one display panel, a backlight module and a first reflective layer is provided. The display panel includes first and second substrates, non-self-luminous display pixels, a light-shielding layer, first and second polarizers. The light-shielding layer includes light-shielding portions and first opening portions. The light-shielding portions respectively surround outer profiles of the non-self-luminous display pixels, and positions of the first opening portions respectively correspond to positions of the non-self-luminous display pixels. The first and second substrates are disposed between the first and second polarizers. The backlight module is disposed under the display panel. The first reflective layer is disposed between the second polarizer and the backlight module. The first reflective layer includes second opening portions, and positions of the second opening portions respectively correspond to the positions of the non-self-luminous display pixels.

Display apparatus

A display panel including a display region and a non-display region, a plurality of gate lines, a plurality of data lines, a pixel array and a gate on array circuit. The non-display region is located at one side of the display region. The plurality of gate lines and the plurality of data lines are disposed in the display region. The pixel array is located in the display region, wherein the pixel array is composed of a plurality of pixel units that are repeatedly arranged. The pixel units consist of three gate lines, two data lines and six sub-pixels, and each sub-pixel is electrically connected to one of the gate lines and one of the data lines located in the pixel array respectively. The gate on array circuit is disposed in the pixel array.

Growing community of inventors

Hsinchu County, Taiwan

Cheng-Kuang Wang