Tpo Displays Corporation

Gudeng Precision Industrial Co., Ltd.

Chimei Innolux Corporation

Chang Yang Material Corp.

Cheng-Hsin Chen

Tien-Jui Lin

Chen-Yu Yang

Ming-Chien Chiu

Po-Ting Lee

Cheng-Ju Lee

I-Lin Wu

Mu-Chia Lee

Hao-Chun Lee

Jr-Hong Chen

Lung-Hsun Song

Wei-Yen Chen

Ming-Hua Huang

Yih-Shing Lee

Hsxg-Ju Sung

Ming-Mo Lo

Chun-Yi Lee

Yao-Pin Hsu

Chi-Wen Peng

Lin-Chun Sun

Yi-Wen Tai

Long-Ming Lu

Kuang-Cheng Kao

Jian-Syun Lu

Hui-Ming Pao

Jung-Huang Lan

According to an example of the present disclosure, a learning tableware set includes a bowl and a spoon used in cooperation with the bowl. The bowl includes a bowl bottom and a curved bowl wall. The bowl bottom includes a peripheral recessed portion on one side of the bowl bottom. One side of the curved bowl wall is annularly connected to an edge of the side of the bowl bottom, and the other side of the curved bowl wall, which is not connected to the bowl bottom, includes a protruding edge extending toward a central axis of the bowl bottom. The spoon includes a holding portion and a scooping portion connected to the holding portion, and a curve of one end of the scooping portion away from the holding portion matches a curve of the peripheral recessed portion.

Learning tableware set

A gas purifier to be applied on a wafer substrate accommodating unit with an inlet hole includes an outer tube and an inner tube. The outer tube is disposed on the wafer substrate accommodating unit and has a plurality of first gas filling apertures. One end of the inner tube is a closed end and the other end is an open end. The inner tube has a plurality of second gas filling apertures, and its open end is interconnected with the inlet hole. The inner tube is movably disposed within the outer tube between a first operating position and second operating position. The second gas filling apertures are correspondingly configured to an inner wall of the outer tube when the inner tube is at a first operating position, and interconnected with the first gas filling apertures when the inner tube is at a second operating position.

Gas purifier for wafer substrate accommodating unit

The present invention relates to an EUV pod having marks, which comprises a mask pod and one or more mark disposed on the mask pod. One or more sensor of a processing machine is used for detecting the one or more mark. By including the one or more mark, the surface roughness of one or more region of the mask pod detectable by the one or more sensor can be altered. The one or more sensor emits light to the mask pod, which reflects the light to the one or more sensor. The one or more sensor receives the reflection light from the mask pod and judges if the voltage generated by the reflection light falls within the reflection ranges of the mark. Thereby, whether the one or more sensor corresponds to the one or more make can be confirmed.

Extreme ultraviolet (EUV) pod having marks

The present invention relates to a wafer transport system and a method of operating the same. The wafer transport system comprises at least one semiconductor apparatus, a track, a transfer device, a positioning device, a carrier and a cleaning device. The wafer transport system transports wafers along the at least one semiconductor apparatus via the carrier riding on the track. The transfer device transfers the wafers from the carrier to the at least one semiconductor apparatus. The positioning device identifies and controls the position of the carrier on the track. The cleaning device maintains the cleanliness of the wafers. The present invention provides advantages for improving the yield rate of a wafer, shortening the fabrication time of a wafer, and offering the flexibility and the extendibility to a wafer transport system.

Wafer transport system and method for operating the same

A system for displaying images is disclosed. A display panel comprises a first substrate and a second substrate with a liquid crystal layer interposed therebetween. A sealant is interposed between the first substrate and a second substrate for sealing the liquid crystal layer. A dielectric layer is overlying the first substrate. Metal lines are overlying the dielectric layer under and/or near the sealant. A planarization layer covers and contacts the dielectric layer and the metal lines to form a first interface between the metal lines and the planarization layer and a second interface between the dielectric layer and the planarization layer. Bridge lines without contacting the planarization layer are disposed under and/or near the sealant, instead of at least a portion of the metal lines contacting the planarization layer.

System for displaying images

Image display systems comprising a first pixel, a second pixel, a scan line, a first data line, and a second data line. In the first pixel, a first transistor is coupled to a first storage capacitor via a first pixel electrode. In the second pixel, a second transistor is coupled to a second storage capacitor via a second pixel electrode. The conductance of the first and second transistors is simultaneously controlled by a scan signal transmitted by the scan line. In a first time interval, the first data line transmits a voltage data to the first pixel electrode via the first transistor. In a second time interval, the second data line transmits the voltage data to the second pixel electrode via the second transistor. The first storage capacitor is designed to generate a proper feedthrough voltage at the first pixel electrode to compensate for a voltage coupling shift at the first pixel electrode that is generated during the second time interval because of the voltage variation at the second pixel electrode.

Image display system

Systems for displaying images and methods for fabricating the same. A representative system includes a substrate having a display region and a peripheral region, and a mosaic color filter pattern formed in the peripheral region. The mosaic color filter pattern includes a plurality of separated pillars and a plurality of channels adjacent to the pillars. Specifically the volume ratio between the pillars and the channel is 1:5 to 2:1, preferably 1:3 to 1:1.

System for displaying images and method with a peripheral region having a mosaic color filter pattern thereon that has pillars and channels and an opening along its boundary

A system for displaying images. The system comprises a transflective liquid crystal display (LCD) panel comprising lower and upper substrates opposing each other and a liquid crystal layer disposed therebetween. The lower substrate comprises reflective and transmissive regions. A stack of a protective layer, a transparent electrode and a reflective electrode is disposed on the lower substrate of the reflective and transmissive regions. The reflective electrode comprises an opening corresponding to the transmissive region to substantially expose the underlying transparent electrode. A transparent dielectric layer is disposed on the surface of the upper substrate facing and corresponding to the lower substrate of the reflective region.

Transflective TFT LCD having stacked layers including a protective layer, a transparent electrode and a ring-shaped reflective electrode surrounding and defining an opening exposing the underlying transparent electrode layer

A system for displaying images is disclosed. A display panel having a multi-domain pixel structure comprises a plurality of electrodes that are physically separated form one another, each defining a domain within pixel, and a capacitance element, electrically connecting the electrodes.

Multi-domain pixel structure in a system for displaying images

A layout of a printed circuit board adaptive to be bonded to an integrated circuit device is introduced here. The layout includes a first metal layer, disposed in a first insulation layer and a second metal layer, disposed in a second insulation layer over the first insulation layer. The first metal layer and the second metal layer are connected to each other through a plurality of contact hole filled with conductive materials and are arranged to be substantially parallel to each other throughout a pad structure region and a line structure region of the printed circuit. The connected first metal layer and second metal layer are used for a signal path from the printed circuit board to the bonded integrated circuit device to improve driving ability of power supply.

Layout of a printed circuit board

Growing community of inventors

Changhua County, Taiwan

Cheng-Hsin Chen