Realtek Semiconductor Inc.

Cheng-Hsin Chang

Chun-Hsing Hsieh

Hsu-Jung Tung

Yi-Shu Chang

Chia-Wei Yu

Sen-Huang Tang

Yi-Lin Chen

Hao-Ying Cheng

Chi-Hsiung Cheng

Tsung-Lian Chou

Jian-Fan Wei

A video processing system includes a main chip and a processing chip. The main chip receives first data. The processing chip is coupled to the main chip, and receives second data and to perform a video processing on at least one of the first data transmitted from the main chip and the second data, in order to drive a display panel. First video carried on the first data or second video on the second data has a first resolution, and the first resolution is at least 8K ultra high definition.

Video processing system and processing chip

A data processing system comprising a decompression circuit, configured to decompress compressed data to generate decompressed data. The decompression circuit comprises: a request transmitting terminal, configured to transmit a data receiving request indicating the decompressed data to be received; a valid information transmitting terminal, configured to transmit valid information indicating which part of the decompressed data is valid; and a data transmitting terminal, configured to transmit the decompressed data. An image processing circuit corresponds to the decompression circuit is also disclosed.

Data processing system and image processing circuit

The present invention discloses an image processing device and an image processing method. The image processing method includes steps of: referring to multiple frames or an auxiliary data associated with the frames to determine whether the frames contain substantially the same frames; selecting the frames according to whether the frames contain substantially the same frames to generate multiple selected frames; and performing video processing on the selected frames. When the frames do not contain substantially the same frames, the selected frames are the same as the frames, and when the frames contain substantially the same frames, the selected frames are part of the frames.

Image processing device and image processing method

An overdriving control method includes: receiving an input image; determining whether the input image is a moving image or a still image, and generating a determining signal; dynamically using image compression process according to the determining signal; and dynamically using overdriving process according to the determining signal. An overdriving control circuit includes a receiving unit, arranged for outputting an input image; a determining unit, arranged for generating a determining signal by determining whether the input image is a moving image or a still image; an image compression processing unit, arranged for dynamically performing image compression process upon the input image according to the determining signal, and generating an image compression processing unit output; and an overdriving processing unit, arranged for dynamically performing an overdriving process upon the image compression processing unit output according to the determining signal, and generating an overdriving processing unit output.

Overdriving control method with image compression control and related circuit

A 2D to 3D image conversion apparatus includes a data queue, a conversion unit and an offset calculation unit. The data queue receives and temporarily stores an input data value corresponding to a current pixel. The conversion unit outputs a current offset table corresponding to a current depth parameter of the current pixel. The current offset table includes (m+1) reference offsets corresponding to the current pixel and neighboring m pixels. The offset calculation unit selects one of the reference offsets corresponding to the current pixel in the current offset table and multiple previous offset tables as a data offset corresponding to the current pixel. The data queue selects and outputs an output data value corresponding to the current pixel according to an integer part of the data offset and the input data value.

2D to 3D image conversion apparatus and method thereof

The present invention relates to a signal transferring system. The signal transferring system includes a first and second layout paths, and a first and second circuits. Lengths of the first and second layout paths are different. The first and second circuits are used for transmitting and receiving at least two signals respectively. In addition, one of the first circuit and the second circuit includes a compensation circuit for adjusting transmission time of one of the at least two transferred signals or adjusting reception time of one of the at least two transferred signals such that the at least two transferred signals reach a second circuit through the first and the second layout paths at substantially the same time.

Signal transferring system with unequal lengths of connecting paths and method thereof

The present invention relates to a look up table method for reducing the use of memory and more particularly to a condition while the input value has higher bits than the output value. This look up table method comprises: data storing that storing the input data into memory corresponding with output data with reference to the address of output data; and data searching including reading an input data, finding a closest address to the input data, and outputting the closest address. In this present invented look-up table method, the relation curve between the output value and corresponded input value is a monotonic curve, such as a &#x3b3; curve.

Look-up table methods for reducing the use of memory volume and system thereof

The present invention is related to a single ended sense amplifier, which is engaged in receiving signals of a memory apparatus of a semiconductor, and generates output signals in an output terminal. The single ended sense amplifier comprises: a first loading unit, which offers a loading current; a first sense switch unit, which is in between a memory apparatus of semiconductor and the first loading unit to couple them together, and connects to the first loading unit to form an output terminal in order to be as a channel switch for a channel from semiconductor memory apparatus to the output terminal of the sense amplifier; a second loading unit, which offers a charging current; a second sense switch unit, which is in between the semiconductor memory apparatus and the second loading unit to couple them together; an inverse logic unit, which is among the semiconductor memory apparatus, the first sense switch unit and the second sense switch unit for controlling the plural sense switch units. Hence, The second sense switch unit is capable to control the charging current to improve the reaction speed of the sense amplifier without pre-charging control signals.

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Hsinchu, Taiwan

Cheng-Hsin Chang