Realtek Semiconductor Inc.

Epistar Corporation

Tekcore Co., Ltd.

Cheng-Hsien Li

Chi-Hao Huang

Wei-Jung Chung

Yung-Tai Chen

Nien-Tze Yeh

Tsung-En Wu

Shih-Hung Lee

Tsung-en Wu

Wen-Hsien Lin

Bo-Rong Huang

Jian-Ru Lin

Chia-wei Yu

Hsin-Hsiung Huang

Hung-Chen Chu

Jenn-Hwa Fu

Jennhwa Fu

Yu-Tung Liao

Sheng-Yang Ho

Wen-Chieh Lai

Hua-Lun Pi

Chih-Chiang Liao

A signal processing device includes a proprietary test mode symbol generating circuit, a decision error detection circuit, and a debug control circuit. The proprietary test mode symbol generating circuit generates prediction symbols as a reference signal according to decision symbols output by a slicer of a receiving signal processing circuit and a predetermined rule. The decision error detection circuit operating in a proprietary test mode continues receiving the decision symbols and the prediction symbols, and generates detection results. The debug control circuit includes a memory device, and continues recording contents of one or more signals obtained from one or more nodes of the receiving signal processing circuit into the memory device. In addition, the debug control circuit receives the detection results, and stops recording the contents of the one or more signals in response to a state of at least one of the detection results.

Signal processing device and associated signal processing method

An amplifier circuit includes a continuous-time linear equalizer, an adjustable gain circuit and a filter circuit. The continuous-time linear equalizer includes a first high-pass path, a first low-pass path, a second high-pass path, and a second low-pass path. The first high-pass path is used to increase a gain of a high-frequency part of a first signal source, and the second high-pass path is used to increase a gain of a high-frequency part of a second signal source. The filter circuit is used to amplify and filter the first signal source and the second signal source, and includes a fully-differential operational amplifier, a first filter network, and a second filter network.

Amplifier circuit

An electronic device includes a processor circuit, a frequency-domain-to-time-domain conversion circuit, a transmitter circuit, a hybrid circuit, a receiver circuit, and a time-domain-to-frequency-domain conversion circuit. The processor circuit generates a frequency-domain transmitting signal. The frequency-domain-to-time-domain conversion circuit converts the frequency-domain transmitting signal into a first time-domain transmitting signal. The transmitter circuit generates a second time-domain transmitting signal. The hybrid circuit includes an echo noise cancelling path and an echo noise path. When the echo noise cancelling path is turned off, the processor circuit receives a first frequency-domain receiving signal. When the echo noise cancelling path is turned on, the processor circuit receives a second frequency-domain receiving signal. The processor circuit determines an echo noise cancelling ability of the hybrid circuit according to the first frequency-domain receiving signal and the second frequency-domain receiving signal.

Communication system, electronic device, and determination method for determining echo noise cancelling ability

The present invention discloses a signal transceiving apparatus having echo-canceling mechanism. A mixer circuit includes a Wheatstone bridge and a transformer winding circuit. The Wheatstone bridge includes another transformer winding circuit and a variable load and includes a first input terminal, a first output terminal, a second input terminal and a second output terminal located at each two neighboring arms in an order. A transmission circuit is coupled to the first input terminal and the second input terminal to perform signal transmission through the mixer circuit. A receiving circuit is coupled to the first output terminal and the second output terminal to perform signal receiving through the mixer circuit. A control circuit adjusts the impedance of the variable load when a residual echo noise amount does not satisfy a minimum echo noise amount condition, and stops to adjust the impedance when the residual echo noise amount satisfies the condition.

Signal transceiving apparatus and method having echo-canceling mechanism

An echo estimation system includes a transceiver circuitry and a processor circuitry. The processor circuitry is coupled to the transceiver circuitry. The processor circuitry is configured to calculate linear echo power and non-linear echo power based on a signal under test in the transceiver circuitry. The linear echo power and the non-linear echo power are utilized to determine a quality of the transceiver circuitry or utilized to determine component parameters of the transceiver circuitry.

Echo estimation system and echo estimation method

The present disclosure discloses a signal equalization apparatus. A channel length estimation circuit determines a transmission channel length of the input signal such that a processing circuit retrieves predetermined feed-forward equalizer coefficients. A feed-forward equalizer equalizes the input signal according to operation feed-forward equalizer coefficients. An auto gain circuit amplifies the input signal according to an offset signal. A signal adding circuit adds the amplified input signal and a feedback adjusting signal to generate an added input signal. A data slicer generates a data-slicing result and the offset signal according to reference thresholds based on the added input signal. A feedback equalizer equalizes the data-slicing result to generate the feedback adjusting signal according to operation feedback equalizer coefficients. The feed-forward equalizer and the feedback equalizer keeps updating the equalizer coefficients such that a signal interference noise is eliminated rapidly to increase a signal and noise ratio of the system.

Signal equalization apparatus and signal equalization method

A light-emitting device includes a substrate including an upper surface; a light-emitting stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the light-emitting stack includes a first surface and a second surface opposite to the first surface toward to the upper surface; a plurality of depressions formed in the light-emitting stack and penetrating the second semiconductor layer, the active layer and a portion of the first semiconductor layer; an insulative layer covering the second surface of the light-emitting stack; a connector including a first portion and a second portion; and an electrode disposed at a side of the light-emitting stack and electrically connecting the connector, wherein the first portion of the connector is formed in the plurality of depressions, the second portion of the connector is between the insulative layer and the light-emitting stack.

Light-emitting device

This invention discloses a signal transmitting and receiving circuit of a digital subscriber line used for transmitting an output signal to a telecommunication loop or receiving an input signal from the telecommunication loop. The signal transmitting and receiving circuit comprises a transformer, which is coupled to the telecommunication loop; a signal transmitting module, which is coupled to the transformer, for generating the output signal; a signal receiving module, which is coupled to the transformer, for processing the input signal; an echo cancelling circuit, comprising passive components and having two ends, one of which is coupled to the signal transmitting module and the transformer, the other is coupled to the signal receiving module and the transformer. The output signal is transmitted to the telecommunication loop via the electromagnetic coupling of the transformer, and the input signal is received by the signal receiving module by the electromagnetic coupling of the transformer.

Signal transmitting and receiving circuit of digital subscriber line

The present invention discloses a transceiver of digital subscriber line (DSL) which supports a variety of DSL systems, comprising: a transmission circuit for receiving an output signal and generating a first DSL transmission signal or a second DSL transmission signal according to the output signal under the control of a transmission selection parameter; a hybrid circuit for generating a line transmission signal according to the first or second DSL transmission signal and generating a DSL reception signal according to a line reception signal; and a reception circuit for generating a first DSL reception signal or a second DSL reception signal according to the DSL reception signal, and then outputting one of the first and second DSL reception signals as an input signal according to a reception selection parameter.

Transceiver and communication method of digital subscriber line

A method for manufacturing a light-emitting device comprising the steps of: providing a first substrate, a chip area, and a street area; forming a light-emitting structure on the first substrate; forming a conductive structure between the first substrate and the light-emitting structure; removing a part of the light-emitting structure in the street area to expose a sidewall of the light-emitting structure in the chip area; forming a first passivation layer on the light-emitting structure in the chip area; forming a second passivation layer on the conductive structure in the street area, on the sidewalls of the light-emitting structure, and on the sidewalls of the first passivation layer; forming a through-hole in the first passivation layer, and forming an electrode in the through-hole.

Light-emitting device manufacturing method

The present disclosure provides a light-emitting device having a patterned interface composed of a plurality of predetermined patterned structures mutually distinct, wherein the plurality of predetermined patterned structures are repeatedly arranged in the patterned interface such that any two neighboring patterned structures are different from each other. The present disclosure also provides a manufacturing method of the light-emitting device. The method comprises the steps of providing a substrate, generating a random pattern arrangement by a computing simulation, forming a mask having the random pattern arrangement on the substrate, and removing a portion of the substrate thereby transferring the random pattern arrangement to the substrate.

Light-emitting device having patterned interface and the manufacturing method thereof

An integrated hybrid circuit includes a transmission unit, a transceiver coil, a transceiver circuit, a hybrid matching circuit, and a receiving circuit. The transmission unit generates a pair of upstream signals according to a user transmission signal. The transceiver coil transmits the pair of upstream signals to a central office through a pair of twisted pair, and receiving a pair of downstream signals from the central office through the pair of twisted pair. The hybrid matching circuit receives an adjustment signal to adjust selective impedances. The receiving circuit receives the pair of downstream signals from the central office, and generates the adjustment signal according to downstream and upstream rates and signals from the hybrid matching circuit. The transmission unit adjusts transmission power and bandwidth of the transmission unit and the receiving unit adjusts filter bandwidth of the receiving unit according to the adjustment signal for optimizing upstream and downstream rates.

Integrated hybird circuit applied to a digital subscriber loop and setting method thereof

The present application describes a vertical light-emitting diode (VLED) and its manufacture method that use the combination of a reflective layer, a transparent conducting layer and transparent dielectric layer as structural layers for promoting uniform current distribution and increasing light extraction. In the VLED, a transparent conducting layer is formed on a first outer surface of a stack of multiple group III nitride semiconductor layers. A transparent dielectric layer is then formed on a side of the transparent conducting layer opposite the side of the multi-layer structure. A first electrode structure is then formed on the transparent dielectric layer in electrical contact with the transparent conducting layer via a plurality of contact windows patterned through the transparent dielectric layer. The transparent conducting layer and the transparent dielectric layer are used as structural layers for improving light extraction.

Vertical light-emitting diode

In a method of manufacturing a vertical type light-emitting diode, a multilayered structure of group III nitride semiconductor compounds is epitaxy deposited on an irregular surface of a substrate. The substrate is then removed to expose an irregular surface of the multilayered structure corresponding to the irregular surface of the substrate. A portion of the exposed irregular surface of the multilayered structure is then etched for forming an electrode contact surface on which an electrode layer is subsequently formed. With this method, no specific planarized region is required on the irregular surface of the substrate. As a result, planarization treatment of the substrate is not necessary. The same substrate with the irregular surface can be reused for fabricating vertical and horizontal light-emitting diodes.

Growing community of inventors

Hsinchu, Taiwan

Cheng-Hsien Li