Nan Ya Technology Corporation

Cheng-Hsien Hsieh

Tseng-Fu Lu

Wei-Ming Liao

Ching-Chia Huang

Jhen-Yu Tsai

Chen-Lun Ting

The present disclosure provides a semiconductor structure including a substrate, a bottom gate portion disposed in the substrate, a top gate portion stacked over the bottom gate portion, a first channel layer sandwiched between the top gate portion and the bottom gate portion, and a source/drain region disposed in the substrate at two opposite sides of the top gate portion.

Semiconductor structure and method for preparing the same

A semiconductor structure includes a substrate including a surface, a first doped region and a second doped region, wherein the first doped region and the second doped region are disposed under the surface; a gate structure disposed between the first doped region and the second doped region; a capacitor disposed over and electrically connected to the first doped region; and a bit line disposed over and electrically connected to the second doped region, wherein the bit line includes a conductive portion and an insulating portion surrounding the conductive portion, and the insulating portion includes ferroelectric material.

Growing community of inventors

Taipei, Taiwan

Cheng-Hsien Hsieh