Taiwan Semiconductor Manufacturing Comp. Ltd.

Cheng-En Lee

Shih-Lien Linus Lu

Yi-Hsiung Lin

Jui-Che Tsai

Hsuan-Pang Liu

Chia-Lin Ou

Yao-Jen Yeh

Yu-Der Chih

Jonathan Tsung-Yung Chang

Kun-Hsi Li

Shih-Liang Wang

Systems and method are provided for determining a reliability of a physically unclonable function (PUF) cell of a device. One or more activation signals are provided to a PUF cell under a plurality of conditions. A PUF cell output provided by the PUF cell under each of the plurality of conditions is determined. A determination is made of a number of times the PUF cell output of the PUF cell is consistent. And a device classification value is determined based on the determined number of times for a plurality of PUF cells.

Systems and methods for classifying puf signature modules of integrated circuits

Systems and methods of generating a security key for an integrated circuit device include generating a plurality of key bits with a physically unclonable function (PUF) device. The PUF can include a random number generator that can create random bits. The random bits may be stored in a nonvolatile memory. The number of random bits stored in the nonvolatile memory allows for a plurality of challenge and response interactions to obtain a plurality of security keys from the PUF.

Integrated circuit (IC) signatures with random number generator and one-time programmable device

Disclosed is a physical unclonable function generator circuit and method. In one embodiment, physical unclonable function (PUF) generator includes: a PUF cell array that comprises a plurality of bit cells, wherein each of the plurality of bit cells comprises at least two access transistors, at least one enable transistor, and at least two storage nodes, wherein the at least two storage nodes are pre-configured with substantially the same voltages allowing each of the plurality of bit cells having a first metastable logical state; a PUF control circuit coupled to the PUF cell array, wherein the PUF control circuit is configured to access the plurality of bit cells to determine second logical states by turning on the at least one enable transistor and turning off the at least two access transistors of each of the plurality of bit cells, and based on the second logical states of the plurality of bit cells, to generate a PUF output; and a noise injector coupled to the PUF control circuit and the PUF cell array, wherein the noise injector is configured to create stressed operation conditions to evaluate stability of the plurality of bit cells.

Method and apparatus for noise injection for PUF generator characterization

A physically unclonable function (PUF) cell array includes a first PUF cell in a first column in a first direction, a second PUF cell in a second column, and a first power rail. The first PUF cell includes a first set of conductive structures that include a first conductive structure extending in the second direction and a second conductive structure extending in the first direction. The second PUF cell includes a second set of conductive structures that include a third conductive structure extending in the second direction and a fourth conductive structure extending in the first direction. The first power rail overlapping a first boundary of the first and second PUF cell. At least the first and third conductive structure, or the second and the fourth conductive structure are symmetric to each other with respect to a central line of at least the first or second PUF cell.

PUF cell array, system and method of manufacturing same

A PUF generator includes a difference generator circuit with first and second transistors having a first predetermined VT. The difference generator circuit is configured to provide a first output signal for generating a PUF signature based on respective turn on times of the first and second transistors. An amplifier includes a plurality of transistors having a second predetermined VT. The amplifier is configured to receive the first output signal and output the PUF signature.

Physically unclonable function (PUF) generation

Systems and methods for classifying PUF signature modules of integrated circuits

An ion implantation system comprising: a sample platform; an ion gun; an electrostatic linear accelerator; a direct current (DC) final energy magnet (FEM); and a processor. The processor is programmed to control: a wafer acceptance test instrument, a DC recipe calculator, a DC real energy calculator, and a tool energy shift verifier. The wafer acceptance test instrument is configured to apply a wafer acceptance test (WAT) recipe to a test sample on the sample platform. The DC recipe calculator is configured to calculate a recipe for the DC FEM. The DC real energy calculator is configured to calculate a real energy of the DC FEM. The tool energy shift verifier is configured to verify a tool energy shift of the DC FEM. The ion implantation system is configured to tune the DC FEM based on the verified tool energy shift, and obtain a peak magnetic field of the DC FEM.

Ion implantation method and device

A physically unclonable function (PUF) cell array includes a first PUF cell in a first column in a first direction, and a first row in a second direction, and a second PUF cell in a second row in the second direction. The first PUF cell includes a first set of conductive structures extending in the first and second direction, being on a first metal layer, and including a first and a second conductive structure extending in the first direction. The second PUF cell includes a second set of conductive structures extending in the first direction and second direction, being on the first metal layer and including a third and a fourth conductive structure extending in the first direction. The first and third conductive structures, or the second and fourth conductive structures are symmetric to each other with respect to a central line of the first and second PUF cells.

A physically unclonable function (PUF) cell array includes a first PUF cell arranged in a first column in a first direction and a second PUF cell arranged in a second column in the first direction. The first PUF cell includes a first set of conductive structures extending in the first and a second direction. The second PUF cell includes a second set of conductive structures extending in the first and the second direction. The first PUF cell includes a first conductive structure and a second conductive structure extending in the second direction. The second PUF cell includes a third conductive structure and a fourth conductive structure extending in the second direction. The first and third conductive structure or the second and fourth conductive structure are symmetric to each other with respect to a central line of at least the first or second PUF cell extending in the second direction.

Systems and method are provided for determining a reliability of a physically unclonable function (PUF) cell of a device. A first signal is provided to a first branch of a PUF cell and a second signal is provided to a second branch of the PUF cell, the first and second signals being provided in synchronization. A base PUF cell value is determined based on an output of the PUF cell produced by the first signal and the second signal. A third signal is provided to the first branch and a fourth signal is provided to the second branch, the third signal and fourth signal being provided out of synchronization. A stressed PUF cell value is determined based on an output of the PUF cell produced by the third signal and the fourth signal. The PUF cell is determined to be unusable based on a difference between the PUF cell value and the stressed PUF cell value.

Growing community of inventors

Hsinchu, Taiwan

Cheng-En Lee