Innolux Corporation

Cheng-En Cheng

Yeong-E Chen

Yu-Ting Liu

Cheng-Chi Wang

Yi-Hung Lin

Wen-Hsiang Liao

Kuang-Chiang Huang

Hung-Sheng Chou

The present disclosure discloses a method for manufacturing an electronic device, including: setting a basic working area; providing a supporting platform having a plurality of vacuum valves; disposing a substrate on the supporting platform; applying vacuum attraction to a portion of the substrate through a portion of the plurality of vacuum valves, wherein the portion of the substrate corresponding to the vacuum attraction is defined as an attracted region; and performing an exposure on a portion of the attracted region, wherein an area of the attracted region is larger than the basic working area and smaller than an area of the supporting platform.

Method for manufacturing an electronic device

The present disclosure provides an electronic device including a redistribution layer, a plurality of passive components, and an electronic component. The redistribution layer includes a first insulating layer, a second insulating layer, and a plurality of traces electrically connected to each other through a first opening of the first insulating layer and a second opening of the second insulating layer, wherein the first insulating layer has a first side away from the second insulating layer, and the second insulating layer has a second side away from the first insulating layer. The passive components are disposed on the first side. The electronic component is disposed on the second side. The plurality of passive components are electrically connected to the electronic component through the plurality of traces.

Electronic device

The present disclosure provides a package device including a redistribution layer. The redistribution layer includes a first dielectric layer, a conductive layer, and a second dielectric layer, and the conductive layer is disposed between the first dielectric layer and the second dielectric layer, wherein the redistribution layer has a test mark, the test mark includes a conductive pattern formed of the conductive layer, the conductive pattern includes a center portion and a plurality of extension portions, and the plurality of extension portions are respectively connected to the center portion.

Package device

The present disclosure discloses a method for manufacturing an electronic device, including: setting a basic working area; a photoresist coating process; a development process; an etching process; an exposure process; a metal plating process; and a polishing process, wherein the photoresist coating process, the development process, the etching process, the exposure process, the metal plating process and the polishing process respectively have a maximum optimized process area, and a smallest one of the maximum optimized process areas is selected as the basic working area.

The application relates to a method for manufacturing an electronic device, and in particular, to a method for manufacturing an electronic device with a carrier substrate. The method includes: providing a carrier, forming a first base layer on the carrier; and forming working units on the first base layer. The working units are spaced apart from one another.

Method for manufacturing electronic device

The present disclosure provides a package device and a manufacturing method thereof. The package device includes a redistribution layer which includes a first dielectric layer, a conductive layer and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test pattern that includes a first conductive pattern, and the first conductive pattern is formed of the conductive layer.

Package device and manufacturing method thereof

An electronic component and a manufacturing method thereof are provided. The electronic component includes a structure member and a connecting member. The structure member includes at least one working unit. The at least one working unit is disposed in a first region. The connecting member is disposed on the structure member and includes a second region. The second region is overlapped with the first region, and a metal density of the second region is less than a metal density of the first region. The electronic component and the manufacturing method thereof of the embodiment of the disclosure include the effect of improving the reliability or quality of the electronic component.

Electronic component and manufacturing method thereof

A package device and a manufacturing method thereof are provided. The package device includes a redistribution layer. The redistribution layer includes a first dielectric layer, a conductive layer, and a second dielectric layer, and the conductive layer is disposed between the first dielectric layer and the second dielectric layer, wherein the redistribution layer has a test mark, the test mark includes a conductive pattern formed of the conductive layer, the conductive pattern includes a center portion and a plurality of extension portions, and the plurality of extension portions are respectively connected to the center portion.

The present disclosure provides a manufacturing method of a package device, which includes providing a carrier substrate, a first conductive layer, and a release layer, where the carrier substrate has a device region and a peripheral region, and the first conductive layer and the release layer are disposed on the carrier substrate. The method further includes forming a second conductive layer on the release layer in the device region, where at least one of the first and second conductive layers includes a first pad in the peripheral region. The second conductive layer includes a second pad electrically connected to the first pad through the first conductive layer. The method also includes performing an inspection step to provide an input signal to one of the first and second pads, and to receive an output signal from another of the first and second pads.

Manufacturing method of package device

A package device is provided and includes a redistribution layer. The redistribution layer includes a first dielectric layer, a second dielectric layer, and a conductive layer. The second dielectric layer is disposed on the first dielectric layer, and the second dielectric layer includes a dielectric pattern. The conductive layer is disposed between the first dielectric layer and the second dielectric layer, and the conductive layer includes a first conductive pattern. The dielectric pattern has a through hole, and in a top view of the package device, the first conductive pattern and the through hole are overlapped with each other.

A manufacturing method of a semiconductor package is provided. The manufacturing method includes the following. A plurality of semiconductor components are provided. Each semiconductor component has at least one conductive bump. A substrate is provided. The substrate has a plurality of conductive pads. A transfer device is provided. The transfer device transfers the semiconductor components onto the substrate. A heating device is provided. The heating device heats or pressurizes at least two semiconductor components. During transferring of the semiconductor components to the substrate, the at least one conductive bump of each semiconductor component is docked to a corresponding one of the conductive pads.

Manufacturing method of semiconductor package

A package device and a manufacturing method thereof are provided. The package device includes a redistribution layer including a first dielectric layer, a conductive layer, and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test mark, the test mark includes a plurality of conductive patterns formed of the conductive layer, and the conductive patterns are arranged in a ring shape.

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Miao-Li County, Taiwan

Cheng-En Cheng