Shanghai Zhaoxin Semiconductor Co., Ltd.

Chenchen Song

Yu Zhang

Yingbing Guan

Mengchen Yang

Xiaolong Fei

Jianbin Wang

Aimin Ling

A processor and an operating method thereof for renaming a destination logical register of a move instruction are provided. The processor comprises a plurality of physical registers and a renaming circuit. The renaming circuit is coupled to the plurality of physical registers and is configured to receive an instruction sequence and check the instruction sequence. When a current instruction of the instruction sequence comprises the move instruction, the renaming circuit assigns a first physical register, which is assigned to a source logical register of the current instruction previously, to the destination logical register of the current instruction. The first physical register is one of the plurality of physical registers.

Processor and operating method thereof for renaming destination logical register of move instruction

An instruction translation circuit, a processor circuit, and an executing method thereof are provided. The instruction translation circuit is adapted for being disposed in the processor circuit. The instruction translation circuit includes a formatted instruction queue, a first instruction translator, an instruction detection circuit, and a second instruction translator. The formatted instruction queue stores a plurality of formatted macro instructions. The first instruction translator translates a first formatted macro instruction of the formatted macro instructions and outputs a first micro instruction. When the instruction detection circuit determines that a trap bit in the first formatted macro instruction is set and a part of the first formatted macro instruction can be translated in advance, the instruction detection circuit outputs first trap information. The second instruction translator translates the part of the first formatted macro instruction in advance according to the first trap information to output a second micro instruction.

Instruction translation circuit, processor circuit and executing method thereof

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Beijing, China

Chenchen Song