Himax Technologies, Inc.

Ncku Research and Development Foundation

Raydium Semiconductor Corporation

Chen-Yu Wang

Chien-Hung Tsai

Jia-Hui Wang

Jing-Chuan Qiu

Chien-Ru Chen

Yu-Wen Chiou

Kai-Lan Chuang

Hung-Yu Huang

A level shifter applied in a driving circuit of a display is disclosed. The level shifter includes a first stage of level shifting unit and a second stage of level shifting unit and used to convert an input voltage signal with low voltage level into an output voltage signal with high voltage level. In one example, the total number of the transistors needed by the level shifter is much fewer than that of the prior art, and additional voltage sources are not needed to provide middle voltages. The manufacturing cost of the exemplary level shifter can be reduced and the signal level shifting efficiency of multi-power domain can be enhanced.

Level shifter of driving circuit and operating method thereof

A half-power buffer amplifier is disclosed. A buffer stage includes a first-half buffer stage and a second-half buffer stage, wherein an output of the first-half buffer stage is controllably fed back to a rail-to-rail differential amplifier, and an output of the second-half buffer stage is controllably fed back to the rail-to-rail differential amplifier. The switch network controls the connection between the outputs of the buffer stage and an output node of the half-power buffer amplifier in a manner such that a same pixel, with respect to different frames, of a display panel is driven by the same rail-to-rail differential amplifier. In one embodiment, the rail-to-rail differential amplifier and the buffer stage comprise half-power transistors operated within and powered by half of a full range spanning from power to ground.

Half-power buffer amplifier

An output amplifier includes an amplifier circuit, an output stage circuit, a first switch transistor, and a second switch transistor. The amplifier circuit is used for amplifying an input pixel signal to generate the inverted signal and the non-inverted signal. The output stage circuit has a first output terminal for passing a supply voltage from a supply terminal or passing a ground voltage from a ground terminal to the pixel circuit according to the inverted signal and the non-inverted signal. The first switch transistor passes or blocks the supply voltage according to a high impedance signal, and the second switch transistor passes or blocks the ground voltage according to the inverted high impedance signal.

Output amplifier of source driver with high impedance and inverted high impedance control signals

An output amplifier includes an amplifier circuit, a driving stage circuit, an output stage circuit, a first unity gain buffer, and a second unity gain buffer. The amplifier circuit provides an inverted signal and a non-inverted signal, in which the amplifier circuit amplifies an input pixel signal to generate the inverted signal and the non-inverted signal. The output stage circuit passes a supply voltage or a ground voltage to the pixel circuit according to the inverted signal and the non-inverted signal. The driving stage circuit passes the supply voltage or the ground voltage to the pixel circuit. The first unity gain buffer enhances and passes the inverted signal from the amplifier circuit to the driving stage circuit. The second unity gain buffer passes and enhances the non-inverted signal from the amplifier circuit to the driving stage circuit.

Output amplifier of a source driver with an amplifier circuit having an inverted and non-inverted output

A source driving circuit adapted to drive a display panel is provided herein. The source driving circuit includes a first output buffer and a second output buffer responsible for enhancing signals with different polarities respectively. As for the first output buffer, the first output buffer includes a first differential input stage, a first output stage and a second output stage. The first output stage includes a first level adjustment circuit and a first self-bias providing circuit. The first level adjustment circuit provides a first level voltage according to input signals received by the first differential input stage, such that the second output stage thereby provides a first charge current and a second charge current to output a first output signal based on the first level voltage. The first self-bias providing circuit provides a first biased voltage associated with one input signal to control the first level adjustment circuit to operate.

Source driving circuit with output buffer

A half-power buffer amplifier includes a buffer stage having a first-half buffer stage and a second-half buffer stage. An output of the first-half buffer stage is controllably fed back to a rail-to-rail differential amplifier, and an output of the second-half buffer stage is controllably fed back to the rail-to-rail differential amplifier. A switch network controls the connection between the outputs of the buffer stage and an output node of the half-power buffer amplifier in a manner such that a same pixel, with respect to different frames, of a display panel is driven by the same rail-to-rail differential amplifier.

An output buffer including a first differential input stage, a primary output stage, and a secondary output stage is provided herein. The first differential input stage respectively receives a first and a second input signals via a first and a second input terminals. The primary output stage includes a first and a second output stages. The first output stage provides at least one first level voltage according to the first and the second input signals, and the second output stage controlled by the first level voltage drives an output terminal of the output buffer to a target level. The secondary output stage includes a comparator and a third output stage. The comparator compares the induced currents in the first differential input stage, and thereby generates a control voltage. The third output stage controlled by the control voltage drives the output terminal of the output buffer to the target level.

Output buffer with high driving ability

A pixel circuit has a light emitting diode, a driving transistor, a capacitor, a first switch, a second switch, a third switch, and a forth switch. The driving transistor has a drain, coupled to a second end of the light emitting diode. The capacitor is coupled between a gate of the driving transistor and the ground terminal. The third switch is coupled between the source and the gate of the driving transistor. The fourth switch is coupled between the second end of the light emitting diode and a data line. The first switch is off, the second is on, and the third is on during the reset period; the first switch is off, the second is off, and the third is on during the programming period; and the first switch is on, the second is on, and the third is off during the display period.

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Tainan, Taiwan

Chen-Yu Wang