Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen-Yi Niu

Hung-Wen Su

Chi-Feng Lin

Shu-Cheng Chin

Ming-Yuan Gao

Hsin-Ying Peng

Chih-Chien Chi

Pei-Hsuan Lee

Chih-Hsiang Chang

Yen-Chun Lin

Chun-Kai Chang

A blocking material is selectively deposited on a bottom surface of a back end of line (BEOL) conductive structure such that a barrier layer is selectively deposited on sidewalls of the BEOL conductive structure but not the bottom surface. The blocking material is etched such that copper from a conductive structure underneath is exposed, and a ruthenium layer is deposited on the barrier layer but less ruthenium is deposited on the exposed copper. Accordingly, the barrier layer prevents diffusion of metal ions from the BEOL conductive structure and is substantially absent from the bottom surface as compared to the sidewalls in order to reduce contact resistance. Additionally, the ruthenium layer reduces surface roughness within the BEOL conductive structure and is thinner at the bottom surface as compared to the sidewalls in order to reduce contact resistance.

Conductive structures with bottom-less barriers and liners

A method of manufacturing an interconnect structure includes forming an opening through a dielectric layer. The opening exposes a top surface of a first conductive feature. The method further includes forming a barrier layer on sidewalls of the opening, passivating the exposed top surface of the first conductive feature with a treatment process, forming a liner layer over the barrier layer, and filling the opening with a conductive material. The liner layer may include ruthenium.

Method of forming interconnect structure having a barrier layer

Interconnect structure and method of forming thereof

Growing community of inventors

Hsinchu, Taiwan

Chen-Yi Niu