Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen-Yen Huang

Yen-Di Tsen

Shin-Rung Lu

Ai-Jen Hung

Jong-I Mou

Yi-Ping Hsieh

In some embodiments, the present application is directed to a method and system for process control of a lithography tool. The method transfers a reference pattern to exposure fields of a reference workpiece to form pairs of overlapping reference layers. Misalignment between the overlapping reference layers is measured to form first and second baseline maps, and a &#x394; baseline map is formed from the first and second baseline maps. A production pattern is transferred to exposure fields of a production workpiece to form second production layers arranged over and aligned to first production layers. Misalignment between the first and second production layers is measured to form a production map. The &#x394; baseline map is transformed and subsequently added to the production map, to form a final production map. Parameters of a process tool are updated based on the final production map.

Intra-field process control for lithography

A calibration apparatus is provided. The calibration apparatus includes a wafer carrier configured to support a substrate with a patterned layer. The patterned layer includes a first exposure area and remaining exposure areas, and each of the first and the remaining exposure areas includes a first checking mark. The calibration apparatus also includes a measurement device configured to obtain a first exposure value of the first checking mark of the first exposure area by measuring the first checking mark of the first exposure area. The calibration apparatus also includes a processing module configured to calculate first calculated values of the first checking marks of the remaining exposure areas according to the first exposure value and a standard file. The illumination device is adjusted by an adjustment device of the lithography apparatus according to the first calculated values during a lithography process.

Calibration apparatus and an adjustment method for a lithography apparatus

A method of processing first and second semiconductor wafers is provided. Each of the first and second semiconductor wafers has a first layer and a second layer over the first layer. A first lithographic process is performed on the first layer over the first semiconductor wafer using a first inter-field correction and a first intra-field correction. An overlay error of the first lithographic process is determined. A second inter-field correction and a second intra-field correction are computed based on the first inter-field correction, the first intra-field correction, and the measured overlay error. A second lithographic process is performed on the second layer over the second semiconductor wafer, based on the second inter-field correction and the second intra-field correction.

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Jhunan, Taiwan

Chen-Yen Huang