Future Wei Technologies, Inc.

Huawei Technologies Co., Limited

Santa Clara University

Other

Nanyang Technological University

Chen-Xiong Zhang

Jianhua Zheng

Nam Ling

Zhouye Gu

Lingzhi Liu

Guichun Li

Changcai Lai

Yangyang Tang

Xichao Yang

Qiang Wu

Haibo Liu

Jing Zhao

Jian Zhang

Jingsong Xu

Minqiang Jiang

Kui Fang

Enyi Yao

Ying Cui

Meng Li

Junren Chang

Wei Chen

Wen Zhang

Shulan Feng

Hai Chen

Quanhe Yu

Yuchun Wu

Weisi Lin

Li Song

Xudong Qin

Huilong Xu

Madhusudan Kalluri

Chen Hai

Zefeng Ni

Taru Kanchan

Wei Geng

Anmin Liu

A video coding mechanism is disclosed. The mechanism includes at least one pre-encoder configured to pre-encode a received input video signal, and output a pre-encoded video signal. The mechanism also includes an encoder configured to obtain the pre-encoded video signal from the pre-encoder, and encode the pre-encoded video signal as a bitstream for transmitting the bitstream to decoder for decoding.

Video coding with successive codecs

An apparatus including a memory operably coupled to a processor. The processor is configured to determine whether to use an intra smoothing filter for a rectangular prediction unit (PU), wherein a width of the rectangular PU is different from a height of the rectangular PU.

Mode dependent intra smoothing filter table mapping methods for non-square prediction units

The application discloses a tunneling field-effect transistor, including: a substrate layer; a rectangular semiconductor strip formed on an upper surface of the substrate layer, where the rectangular semiconductor strip includes a first source region, a first channel region, a drain region, a second channel region, and a second source region that are disposed in sequence along a first direction; a first gate dielectric layer covering an outer surface of a first part of the first source region and a second gate dielectric layer covering an outer surface of a third part of the second source region.

Tunneling field-effect transistor and method for manufacturing tunneling field-effect transistor

A voltage regulation circuit includes a first comparison and control unit and a second comparison and control unit. The first comparison and control unit is connected to a first switch unit, determine a first bias voltage based on a first output voltage, a first reference voltage, and a second reference voltage, and control a value of an equivalent resistance of the first switch unit using the first bias voltage. The second comparison and control unit is connected to a third switch unit and the second switch unit, determine a second bias voltage based on the first output voltage, a second output voltage, and a third reference voltage, and control values of equivalent resistances of the third switch unit and the second switch unit using the second bias voltage.

Voltage regulation circuit

A method for non-uniform mapping for quantization matrix coefficients between different sizes of quantization matrices in image/video coding includes obtaining a first quantization matrix and identifying a second quantization matrix to be formed therefrom. The second quantization matrix is a factor of two larger than the first quantization matrix. The second quantization matrix is populated with values from the first matrix through non-uniform mapping of the first quantization matrix. Non-uniform mapping to populate the second quantization matrix includes directly mapping values of all or a portion of the first quantization matrix into a most upper left portion of the second quantization matrix and mapping up-sampling values of the first quantization matrix into a remaining portion of the second quantization matrix. A frequency position pattern may be applied to the first quantization matrix to directly map only those values within the frequency position pattern into a most upper left portion of the second quantization matrix.

Method and apparatus for non-uniform mapping for quantization matrix coefficients between different sizes of quantization matrices in image/video coding

A phase shifter, a quantum logic gate apparatus, an optical quantum computing apparatus, and a phase shift method, where the phase shifter includes an optical resonant cavity and a quantum point, where a resonance frequency of the optical resonant cavity is &#x3c9;, the quantum point is located in the optical resonant cavity, and a transition frequency of the quantum point is &#x3c9;, the quantum point and the optical resonant cavity are coupled to form a coupled system, and a transition energy difference of the coupled system is determined by &#x3c9;, &#x3c9;, and a coupling strength between the quantum point and the optical resonant cavity (g), and &#x3c9;is set.

Phase shifter, quantum logic gate apparatus, optical quantum computing apparatus, and phase shift method

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for performing intra coding predictions. An intra-coding process applied to pixels in a frame of media is determined. The intra-coding process is determined whether to corresponding to at least one of most probable modes. In response to determining the intra-coding process does not correspond to the at least one of the most probable modes, four angular prediction modes are extracted from a list of prediction modes. A set of candidates based on the four angular prediction modes are determined. A pre-defined order of the set of candidates is determined, wherein each candidate mode of the set of candidate modes is included in a ranked order and signaled with a particular fixed length coding, and wherein a length of the particular fixed length coding increases based on the pre-defined order of the set of candidate modes.

Non-MPM mode coding for intra prediction in video coding

An apparatus including a memory operably coupled to a processor. The processor is configured to select an intra smoothing filter for a rectangular prediction unit (PU) based on a lookup table (LUT) used for square PUs, wherein a width of the rectangular PU is different from a height of the rectangular PU.

A field effect transistor and a manufacturing method thereof are provided. The field effect transistor includes two top gate structures (C andD) and two bottom gate structures (A andB). The top gate structures (C andD) and the bottom gate structures (A andB) are opposite to each other in pair. This increases a quantity of control-voltage-induced carriers in the field effect transistor, and therefore increases an output current of the field effect transistor, improves a power gain limit frequency in high-frequency use, and makes an electric field between the top gate structures (C andD) and the bottom gate structures (A andB) more adequately cover a channel layer () between source structures (and) and a drain (), thereby reducing a parasitic effect in a high frequency, and further improving a frequency characteristic of the field effect transistor.

Field effect transistor and manufacturing method thereof

The present disclosure relates to a tunneling field-effect transistor and a fabrication method. One example transistor includes a semiconductor substrate, a semiconductor nanosheet, a source region and a drain region, a dielectric layer, and a gate metal layer. The semiconductor nanosheet is vertically disposed on the semiconductor substrate. The source region and the drain region are connected using a channel. The drain region, the channel, and the source region are disposed on the semiconductor nanosheet in turn. The drain region is in contact with the semiconductor substrate. The source region is located at an end, of the semiconductor nanosheet, far away from the semiconductor substrate. The dielectric layer comprises at least a gate dielectric layer, is disposed on a surface of the semiconductor nanosheet, and surrounds the channel. The gate metal layer is disposed on a surface of the gate dielectric layer and surrounds the gate dielectric layer.

Tunneling field-effect transistor and fabrication method thereof

System and method embodiments for image coding are disclosed. In an embodiment, a method in a data processing system for image encoding includes determining a sparsity constraint according to a dimension of an input image signal. The method also includes iteratively determining a plurality of approximations to the input image signal. Each iteration provides an approximation of the input image signal. Each approximation includes a set of dictionary element indices and coefficients. The dictionary is an over-complete dictionary. Iterations of the determining step are terminated when a number of iterations is equal to the sparsity constraint. The method also includes selecting one of the plurality of approximations according to a minimum rate-distortion cost. The method also includes determining an encoded image signal according to non-zero coefficients and corresponding indices for each non-zero coefficient in the selected approximation.

Systems, methods, and devices for image coding

An apparatus comprises a receiver configured to receive video views comprising a reference view and a current view, wherein the reference view comprises a reference block and the current view comprises a current block, and a processor coupled to the receiver and configured to determine neighboring reference pixels associated with the reference block, determine neighboring current pixels associated with the current block, determine a first positional pairing between the neighboring reference pixels and the neighboring current pixels, determine a second positional pairing between the neighboring reference pixels and the neighboring current pixels, and determine an optimal pairing from between the first positional pairing and the second positional pairing.

Illumination compensation (IC) refinement based on positional pairings among pixels

An information processing method, includes calculating, using a first station, an estimated ratio of a quantity of pulses affected by a photon-number splitting (PNS) attack including a multi-photon in the pulses to a total quantity of the pulses, performing, using the first station, error correction processing on key information based on the estimated ratio to obtain a shared key of the first station and a second station when the estimated ratio is less than a preset threshold. Hence, a degree to which the photon is affected by the PNS attack can be estimated in order to perform error correction on the key information, thereby improving security of a key distribution.

Information processing method and apparatus

A semiconductor device and a method for fabricating a semiconductor device are disclosed. The semiconductor device includes a tunnel field-effect transistor and a planar device. The tunnel field-effect transistor includes a first substrate and a first electrical element, and the first electrical element is formed on one side of the first substrate; the planar device includes a second substrate and a second electrical element, the second substrate and the first substrate are an integrated structure and form a main substrate, the second electrical element is formed on one side of the second substrate, and the second electrical element and the first electrical element are disposed on a same side of the main substrate; and the planar device includes any one of a metal oxide semiconductor transistor, a capacitor, and a resistor.

Growing community of inventors

Plano, TX, United States of America

Chen-Xiong Zhang