Silicon Integrated Systems Corporation

Industrial Technology Research Institute

Chen-Wen Tsai

Wei-Feng Lin

Chung-Ju Wu

Ching-Sung Hsiao

Mu-Sheng Liao

Ching-Jung Huang

Cheng-Chung Cheng

Chia-Wen Shih

A chip-packaging substrate. The substrate is capable of reducing damage during packaging, shrinking its connecting portions so that the length of any of the gap slots between the packaging portion and the frame portion of the substrate is increased. Furthermore, a dummy layer is provided to one surface of the frame portion to flush the surface on the frame portion with that of the packaging portion as much as possible.

Chip-packaging substrate

A multi-layered substrate having built-in capacitors is disclosed. The substrate comprises at least one high permittivity of dielectric material filled in the through holes between the power plane and the ground plane so as to form capacitors. The built in capacitors are to decouple high frequency noise due to the voltage fluctuation.

Multi-layered substrate with a built-in capacitor design and a method of making the same

A bond pad structure and a method of fabricating such structure are disclosed in the invention. The bond pad structure is formed over a predetermined area defined on a semiconductor substrate. The bond pad structure includes at least two metal layers formed over the predetermined area and at least one sub-structure combination layer which each is formed over the predetermined area and formed between two corresponding first metal layers. Each sub-structure combination layer includes a dielectric layer formed over the predetermined area, formed-through via openings with special disposition on the dielectric layer, a first diffusion barrier layer formed over the dielectric layer and the sidewalls and bottom of the via openings, a metal material filled into the via openings to form via plugs, and a second diffusion barrier layer formed over the first diffusion barrier layer and via plugs. Due to special disposition of via plugs and well adhesion between metal layer and diffusion barrier layers, the bond pad structure, according to the invention, can prevent form damage possibly induced during subsequent probe test procedure and wire bonding process.

Bond pad structure and its method of fabricating

An apparatus for reducing an electrical noise inside a ball grid array package is disclosed. The apparatus mainly comprises a substrate, a plurality of solder balls and a plurality of inside-connected capacitors. The substrate includes a contact layer, a power plane and a ground plane. The plurality of solder balls are fixed on the contact layer. The plurality of inside-connected capacitors are fixed on the contact layer, and a conductive glue is used to electrically connect the capacitors to the power plane and ground plane to reduce the electrical noise between the power plane and ground plane.

Apparatus for reducing an electrical noise inside a ball grid array package

A testing jig for semiconductor components, mainly comprising a main jig body, wherein on its bottom is provided with a retrieving head. While on the center of the bottom of the retrieving head is provided with a concave space, around which is arranged a plurality of air holes which are connected with the internal airways and also connected with the air inlet on the top of the main body. Furthermore, on the bottom of the main jig body is provided with two buffer blocks on opposite sides, which can prevent the chip on the center of the base board from being contacted with external force or foreign objects in the process of retrieving the base board during testing.

Jigs for semiconductor components

A method for reducing electrical noise inside a ball grid array package for installing capacitors between a plurality of power pads and ground pads on a top side of a substrate of the ball grid array package coats solder paste on the plurality of power pads and ground pads, coats adhesive glue beneath the plurality of capacitors, fixes the plurality of capacitors on the power pads and ground pads with the adhesive glue and solder paste, and solidifies the adhesive glue in a reflow soldering stove.

Method for reducing an electrical noise inside a ball grid array package

A multi-layered substrate having built-in capacitors is used to decouple high frequency noise generated by voltage fluctuations between a power plane and a ground plane of a multi-layered substrate. At least one kind of dielectric material, which is filled in through holes between the power plane and the ground plane, with high dielectric constant is used to form the built-in capacitors.

Multi-layered substrate with a built-in capacitor design

A tray is adapted to receive a plurality of ball grid array devices therein, and includes a base plate having a device-receiving portion and a peripheral portion around the device-receiving portion. The device-receiving portion has a top side formed with a device-receiving recess. The top side of the device-receiving portion is further formed with a partition unit in the device-receiving recess for dividing the device-receiving recess into a plurality of cavities adapted for receiving the ball grid array devices respectively therein. The device-receiving portion further has a bottom side formed with a plurality of openings. Each of the openings is aligned with a corresponding one of the cavities and is adapted to receive an array of ball contacts formed on a bottom side of the ball grid array device that is disposed in the corresponding one of the cavities therein. The openings are grouped into a set of first openings remote from the peripheral portion and a set of second openings surrounding the first openings and adjacent to the peripheral portion. Guard strips are formed on the bottom side of the device-receiving portion and are disposed solely and respectively in the second openings.

Tray for ball grid array devices

Porous ceramic composition comprises 24-45 wt % of gairome, 25-45 wt % of chamotte, 2-10 wt % of low thermal expansivity component, 2-10 wt % of mineralizing agents, and 15-30 wt % of at least two kinds of organic components which provide porosity. The porous ceramic radiation plate is produced by sintering the composition, and the end result is a product that is high in quality and has an efficient thermal radiation transfer.

Growing community of inventors

Hsinchu, Taiwan

Chen-Wen Tsai