Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen-Ming Wang

Chih-Tsung Shih

Bo-Tsun Liu

Chih-Ming Ke

Yahru Cheng

Tsung Chuan Lee

Tsai-Sheng Gau

Yen-Liang Chen

Heng-Jen Lee

Te-Chih Huang

Ho-Yung David Hwang

Wen-Zhan Zhou

Kai-Hsiung Cheng

A method of generating a layout pattern includes disposing a photoresist layer of a resist material on a substrate and disposing a top layer over of the photoresist layer. The top layer is transparent for extreme ultraviolet (EUV) radiation and the top layer is opaque for deep ultraviolet (DUV) radiation. The method further includes irradiating the photoresist layer with radiation generated from an EUV radiation source. The radiation passes through the top layer to expose the photoresist layer.

Method of reducing undesired light influence in extreme ultraviolet exposure

A method for controlling semiconductor production through use of a Focus Exposure Matrix (FEM) model includes taking measurements of characteristics of a two-dimensional mark formed onto a substrate, the two-dimensional mark including two different patterns along two different cut-lines, and comparing the measurements with a FEM model to determine focus and exposure conditions used to form the two-dimensional mark. The FEM model was created using measurements taken of corresponding two-dimensional marks formed onto a substrate under varying focus and exposure conditions.

Two-dimensional marks

A method of determining overlay error in semiconductor device fabrication includes receiving an image of an overlay mark formed on a substrate. The received image is separated into a first image and a second image, where the first image includes representations of features formed on a first layer of the substrate and the second image includes representations of the features formed on a second layer of the substrate. A quality indicator is determined for the first image and a quality indicator is determined for the second image. In an embodiment, the quality indicators include asymmetry indexes.

System and method for alignment in semiconductor device fabrication

Growing community of inventors

Kaohsiung, Taiwan

Chen-Ming Wang