Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen-Hung Tsai

Mei-Yun Wang

Fu-Kai Yang

Chen-Ming Lee

A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a first plurality of channel members over a backside dielectric layer, a second plurality of channel members over the backside dielectric layer, a silicide feature disposed in the backside dielectric layer, and a source/drain feature disposed over the silicide feature and extending between the first plurality of channel members and the second plurality of channel members. The silicide feature extends through an entire depth of the backside dielectric layer.

Silicide backside contact

Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.

Integrated circuits having protruding interconnect conductors

A semiconductor structure includes an isolation feature disposed over a semiconductor substrate, a semiconductor fin disposed over the semiconductor substrate and adjacent to the isolation feature, a source/drain (S/D) feature disposed over the semiconductor substrate and apart from the isolation feature, an interlayer dielectric (ILD) layer disposed over the isolation feature and the S/D feature, a first contact plug disposed in the ILD layer and over the isolation feature, a second contact plug disposed in the ILD layer and over the S/D feature, and a dielectric layer between surfaces of the first contact plug and the ILD layer and between a sidewall of the second contact plug and the ILD layer, where a bottom surface of the second contact plug is free of the dielectric layer.

Methods of forming contact features in semiconductor devices

A method includes forming a first trench in an isolation region; forming a second trench in a device region, wherein the device region is disposed adjacent to the isolation region and each of the first and second trenches is disposed between two metal gate structures; forming a first dielectric layer in the first and the second trenches; forming a second dielectric layer over and different from the first dielectric layer; removing a portion of the second dielectric layer from the first and the second trenches, leaving behind a remaining portion of the second dielectric layer in the first trench; removing a portion of the first dielectric layer formed over a bottom surface of the second trench; subsequent to removing the portion of the first dielectric layer, removing the remaining portion of second dielectric layer from the first trench; and forming contact features in the first and the second trenches.

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Hsinchu, Taiwan

Chen-Hung Tsai