Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen-Feng Hsu

Tzu-Chiang Chen

Chao-Ching Cheng

Yu-Lin Yang

Wei-Sheng Yun

Tung Ying Lee

Clement Hsingjen Wann

Chih-Hsin Ko

Sung-Li Wang

Neng-Kuo Chen

Sey-Ping Sun

Ding-Kang Shih

Gin-Chen Huang

Yi-An Lin

Meng-Chun Chang

Hau-Yu Lin

Chih Chieh Yeh

Tung-Ying Lee

Kuo-Cheng Chiang

Cheng-Hsien Wu

Chien-Min Lee

Xinyu Bao

Jung-Piao Chiu

Hengyuan Lee

Yi-Tang Lin

Chih-Chieh Yeh

Chun-Hsiung Tsai

Nanowire devices and fin devices are formed in a first region and a second region of a substrate. To form the devices, alternating layers of a first material and a second material are formed, inner spacers are formed adjacent to the layers of the first material, and then the layers of the first material are removed to form nanowires without removing the layers of the first material within the second region. Gate structures of gate dielectrics and gate electrodes are formed within the first region and the second region in order to form the nanowire devices in the first region and the fin devices in the second region.

Semiconductor device and method

A memory device includes a substrate, a transistor disposed over the substrate, an interconnect structure disposed over and electrically connected to the transistor, and a memory stack disposed between two adjacent metallization layers of the interconnect structure. The memory stack includes a bottom electrode disposed over the substrate and electrically connected to a bit line, a memory layer disposed over the bottom electrode, a selector layer disposed over the memory layer, and a top electrode disposed over the selector layer and electrically connected to a word line. Besides, at least one moisture-resistant layer is provided adjacent to and in physical contact with the selector layer, and the at least one moisture-resistant layer includes an amorphous material.

Memory devices and methods of forming the same

A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the epitaxial region includes an upper contact portion and a lower contact portion. The upper contact portion includes a metal layer over the upper surface and a barrier layer over the metal layer. The lower contact portion includes a metal-insulator-semiconductor (MIS) contact along the under-surface. The MIS contact includes a dielectric layer on the under-surface and the barrier layer on the dielectric layer.

Wrap-around contact on FinFET

In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. A source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space. The first semiconductor layers are laterally etched through the source/drain space. An inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers. A source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. A lateral end of each of the first semiconductor layers has a V-shape cross section after the first semiconductor layers are laterally etched.

Method of manufacturing a semiconductor device and a semiconductor device

A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes semiconductor wires disposed over a substrate, a source/drain epitaxial layer in contact with the semiconductor wires, a gate dielectric layer disposed on and wrapping around each channel region of the semiconductor wires, a gate electrode layer disposed on the gate dielectric layer and wrapping around the each channel region, and dielectric spacers disposed in recesses formed toward the source/drain epitaxial layer.

Semiconductor device and method of manufacturing the same

A method for forming a semiconductor structure includes receiving a substrate including a dielectric structure; forming a first recess in the substrate; forming a dielectric spacer over a sidewall of the first recess; forming a first semiconductor layer to fill the first recess; removing the dielectric structure to form a second recess over the substrate; and forming a second semiconductor layer to fill the second recess. The dielectric spacer is sandwiched between the first semiconductor layer and the second semiconductor layer.

Method for forming semiconductor structure

Growing community of inventors

Hsinchu, Taiwan

Chen-Feng Hsu