Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen Chu-Hsuan

Tsung-Yu Chiang

Hsin-Lung Chao

Kuang-Hsin Chen

Chen Kuang-Hsin

Among other things, one or semiconductor arrangements, and techniques for forming such semiconductor arrangements are provided. An etch sequence is performed to form a first etched region over a planar region of a semiconductor arrangement. The first etched region exposes a planar structure, such as an alignment mark used for alignment during semiconductor fabrication. The etch sequence forms a second etched region over a semiconductor fin region of the semiconductor arrangement. In an embodiment, the etch sequence forms a first trench, a first fin nub and a first pillar in the semiconductor fin region, where the first trench is formed in a semiconductor substrate of the semiconductor fin region. A multi-depth STI structure is formed over at least one of the first trench, the first fin nub, or the first pillar.

Semiconductor arrangement with fin features having different heights

Methods for forming a semiconductor arrangement of fins having multiple heights and an alignment mark

Semiconductor arrangement with fins having multiple heights and a dielectric layer recessed in the substrate

Methods for forming a semiconductor arrangement with multiple-height fins and substrate trenches

Semiconductor arrangement with multiple-height fins and substrate trenches

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Taipei, Taiwan

Chen Chu-Hsuan