Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen-Chia Wang

Ming-Dou Ker

Harry Chuang

Hun-Hsien Chang

Disclosed herein are a junction where electrical interconnects on a semiconductor substrate intersect and a method of manufacturing a junction where electrical interconnects on a semiconductor substrate intersect is disclosed. In one embodiment, the junction includes a portion of at least one current providing electrical interconnect having a length parallel to a longitudinal axis thereof and configured to provide a flow of electrical current. In addition, the junction includes a portion of at least one current receiving electrical interconnect having a length parallel to a longitudinal axis thereof and configured to intersect with the at least one current providing interconnect at the junction in order to receive the flow of electrical current from the at least one current providing interconnect. Also, in such an embodiment, the junction includes at least one current directing feature positioned between the current providing and current receiving interconnects, and oriented substantially non-perpendicular to the longitudinal axis of the at least one current providing interconnect.

Interconnect junction providing reduced current crowding and method of manufacturing same

An apparatus of preventing integrated circuits from interfering by electrostatic-discharge (ESD), applied in an internal circuit and an input pad, both coupled with a first power line and a second power line, comprises a voltage clamp circuit and a voltage bias circuit. The voltage clamp circuit, with a transistor, connects to the second power line for clamping potential level through the voltage clamp circuit. The voltage bias circuit, with at least one diode coupled in series, connects to the voltage clamp circuit and the first power line for biasing the voltage clamp circuit to the second power line.

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Hsinchu, Taiwan

Chen-Chia Wang