Phison Electronics Corporation

Chen-An Hsu

Wei Hung Lin

Shih-Jia Zeng

Chih-Wei Wang

Chun-Wei Tsao

Chen Yang Tang

Yi-Fang Chang

The present disclosure provides a memory management method, a memory storage apparatus and a memory control circuit unit. The method includes: performing a first operation on a plurality of physical units to obtain a quality estimation parameter corresponding to the physical units; establishing a check list according to the quality estimation parameter, wherein the check list records index information of a first physical unit among the physical units, and a number of the first physical unit is less than a total number of the physical units; and in response to a default condition being satisfied, performing a status scanning on the first physical unit according to the index information in the check list.

Memory management method, memory storage apparatus and memory control circuit unit

A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.

Decoding method, memory storage device and memory control circuit unit

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Taipei, Taiwan

Chen-An Hsu