Intel Corporation

Chee Siang Chow

Poh Thiam Teoh

Hooi Kar Loo

Maxim Dan

Shashitheren Kerisnan

Christopher Wing Hong Ngau

Aspects of the embodiments are directed to systems, methods, and devices for controlling power management entry. A PCIe root port controller can be configured to receive, at a downstream port of the root port controller, from an upstream switch port, a first power management entry request; reject the first power management entry request; transmit a negative acknowledgement message to the upstream switch port; initiate a timer for at least 20 microseconds; during the 20 microseconds, ignore any power management entry requests received from the upstream switch port; receive, after the expiration of the 20 microseconds, a subsequent power management entry request; accept the subsequent power management entry request; and transmit an acknowledgement of the acceptance of the subsequent power management entry request to the upstream switch port.

Growing community of inventors

Pulau Pinang, Malaysia

Chee Siang Chow