Globalfoundries Singapore Pte. Ltd.

Chartered Semiconductor Manufacturing Ltd (corporation)

Chee Kong Leong

Juan Boon Tan

Bei Chao Zhang

Ramasamy Chockalingam

Xuesong Rao

Ranjan Rajoo

Chor Shu Cheng

Xiaodong Li

Chao Li

Siau Ben Chiah

Sean Lian

Johnny Cham

Ming Lei

Puay San Chia

Gary Chia

Rajneesh Jaiswal

Zhong Yun Zhu

Haznita Abd Karim

Ravi Sankar Yelamanchi

Lieyong Yang

Kin San Pey

Hua Xiao

Xiongfei Yu

Kelvin Tianpeng Guan

A semiconductor device is provided that includes a dielectric layer, a bond pad, a passivation layer and a planar barrier. The bond pad is positioned in the dielectric layer. The passivation layer is positioned over the dielectric layer and has an opening over the bond pad. The planar barrier is positioned on the bond pad.

Bond pads of semiconductor devices

A method of forming an IC is presented. The method includes providing a substrate having a plurality of transistors formed thereon. The transistors have gate stack, source and drain regions. An electrical strap is formed and in contact with at least a portion of at least one sidewall of the gate stack of a first transistor to provide a continuous electrical flowpath over a gate electrode of the first transistor and the source or drain region of a second transistor.

Integrated circuit structure with electrical strap and its method of forming

A method for controlling and/or calibrating rapid thermal process systems is described. One or more wafers comprising a silicon semiconductor substrate having a refractory metal layer thereon are silicided in a RTP system at different temperatures. Sheet resistance uniformity of the wafer is measured thereby detecting silicidation phase transition temperature points at the highest uniformity points. The temperature points are used to calibrate or to reset the RTP system. A plurality of wafers comprising a silicon semiconductor substrate having a refractory metal layer thereon can be silicided in each of a plurality of rapid thermal process systems. Sheet resistance uniformity of each of the wafers is measured thereby detecting silicidation phase transition temperature points by highest sheet resistance uniformity for each of the RTP systems. The temperature points are used to match temperatures for each of the RTP systems. The temperature point depend upon the type of refractory metal used and can range from about 200 to 800 &deg; C.

Using refractory metal silicidation phase transition temperature points to control and/or calibrate RTP low temperature operation

Growing community of inventors

Singapore, Singapore

Chee Kong Leong