Pmc-sierra, Inc.

Cavium, Inc.

Chee Hu

Brian D Alleyne

Darren S Braun

Brian D Holden

Raghavan Menon

Steve T Sprouse

Nadeem Haq

Kevin Reno

Bryan Chin

Ahmed Shahid

Najeeb Imran Ansari

Jeffrey Schroeder

Paul G Scrobohaci

Dinesh Venkatachalam

Imran N Chaudhri

Michael Carns

Leo Chen

Wu Ye

Brian Hunter

Brain D Holden

Jeff Pangborn

In one embodiment, a processor comprises a plurality of hardware resources, each hardware resource having a clock cycle. The processor also comprises a plurality of work stores, each work store assigned into one of a plurality of virtual functions if a mode of the processor is set to a virtual function mode, and each work store assigned into one physical function if the mode of the processor is set to a physical function mode. The processor further comprises dispatch logic configured to dispatch work from any work store corresponding to any virtual function or physical function to any released hardware resources.

Processor with dedicated virtual functions and dynamic assignment of functional resources

Methods and devices useful in high-speed scalable switching systems include a memoryless switch fabric, per virtual channel queuing, digital phase aligners, randomized and complement connection modes, a mid-point negative acknowledge and output negative acknowledge scheme among other elements. A particular implementation of a routing table and switch element is described in part to illustrate the various techniques and devices of the invention.

Apparatus for high speed communication system

Method for a high speed communication system

Method and apparatus for high speed, scalable communication system

Growing community of inventors

Fremont, CA, United States of America

Chee Hu