Intel Corporation

Chee Hong Aw

Chia How Low

Jia Jun Lee

Kevin Beow Ee Tan

An Embedded Universal Serial Bus 2.0 (USB2) device includes a physical layer having a detection mechanism to detect an Single-ended 1 (SE1) valid state and differentiate the SE1 valid state from other USB2 states.

State detection mechanism

Some embodiments include apparatuses having input nodes to receive input signals, output nodes to provide output signals, a first stage including a first pair of input transistors, the first pair of transistors including gates coupled to the input nodes, a second stage including a second pair of input transistors, the second pair of transistors including gates coupled to the input nodes, and a third stage including inverters coupled to the output nodes. The inverters are coupled to the first and second stages at the same nodes to switch the output signals between different voltages based on the input signals.

Latched comparator circuit

Described is an apparatus which comprises a pass-gate; and a control unit to control gate terminal of the pass-gate according to first availability of first or second power supplies, the control unit including: a voltage detector to detect the second power supply; and a supply switching circuit to generate a local supply for controlling the gate terminal of the pass-gate according to an output of the voltage detector.

Low power circuit for transistor electrical overstress protection in high voltage applications

A squelch detector includes is configured to receive a time-varying differential communication signal, and includes switched capacitors and an inverter configured to provide an indication of whether a level of the received communication signal is above or below a threshold value.

Growing community of inventors

Klang, Malaysia

Chee Hong Aw