Mediatek Corporation

Che-Ming Hsu

Jih-Ming Hsu

Ming-Hsien Lee

Wen-Tsan Hsieh

Chih-Yu Chang

Tai-Yu Chen

Chiung-Fu Chen

Jen-Chieh Yang

Shih-Yen Chiu

Yu-Mao Kao

Yen-Lin Lee

Shih-Chieh Huang

Ting-Chang Huang

Chi-Wei Yang

Yeh-Ji Chou

Wan-Ching Huang

Chih-Chung Cheng

Yen-Hsiang Li

Tzu-Hung Yen

Chung-Min Kao

A graphics accelerator device offloads the workload of a graphics processing unit (GPU) by performing image composition and other specialized functions. The graphics accelerator device includes a rasterization module to rasterize a set of primitives to a set of pixels and generate information of the set of pixels. The graphics accelerator device also includes intra-process module to retrieve pixel values from a memory according to the information received from the rasterization module, perform mathematical calculations on the pixel values, and generate one or more processed image layers. The graphics accelerator device further includes an inter-process module to composite the one or more processed image layers received from the intra-process module with other image layers retrieved from the memory, and output a composited image to a display.

Graphics Accelerator

One dynamic task scheduling method includes: receiving a task, wherein the task comprises a kernel and a plurality of data items to be processed by the kernel; dynamically partitioning the task into a plurality of sub-tasks, each having the kernel and a variable-sized portion of the data items; and dispatching the sub-tasks to a plurality of computing devices of a heterogeneous computing system. Another dynamic task scheduling method includes: receiving a task, wherein the task comprises a kernel and a plurality of data items to be processed by the kernel; partitioning the task into a plurality of sub-tasks, each having the kernel and a same fixed-sized portion of the data items; and dynamically dispatching the sub-tasks to a plurality of computing devices of a heterogeneous computing system.

Dynamic task scheduling method for dispatching sub-tasks to computing devices of heterogeneous computing system and related computer readable medium

A method and a computer-readable medium for dynamically managing power of a multi-core processor of a computing system are provided. The multi-core processor generates a dynamic voltage and frequency scaling (DVFS) table, determines a first index by alternatively selecting either a power budget or a required performance thereof, determines a current thread level parallelism (TLP) of the computing system, selects one of entries according to the current TLP and the first index, and configure first cores and second cores thereof according to a first settings and a second settings of the selected entry.

Method and computer-readable medium for dynamically managing power of multi-core processor

An electronic device has a processing system and a management circuit. The processing system executes an application. The management circuit detects an operating behavior of the application during execution of the application, analyzes the detected operating behavior of the application to generate an application identification result, and configures an application-dependent task according to at least the application identification result.

Electronic device capable of configuring application-dependent task based on operating behavior of application detected during execution of application and related method thereof

Growing community of inventors

Miaoli County, Taiwan

Che-Ming Hsu