Taiwan Semiconductor Manufacturing Comp. Ltd.

Che-Hung Liu

Tzu-Chung Tsai

Szu-Hsien Lo

Chung-Liang Cheng

Chyi-Tsong Ni

Ming-Cheng Lin

Yu-Cheng Shen

Wen-Cheng Cheng

Yu-Ting Tsai

Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a substrate. A resistor overlies the substrate. The resistor comprises a first metal nitride structure, a second metal nitride structure spaced from the first metal nitride structure, and a metal structure disposed between the first metal nitride structure and the second metal nitride structure. A first dielectric structure is disposed over the substrate and the resistor.

Multi-layered resistor with a tight temperature coefficient of resistance tolerance

An apparatus for manufacturing a semiconductor device may include a chamber, a chuck provided in the chamber, and a biased power supply physically connected with the chuck. The apparatus may include a target component provided over the chuck and the biased power supply, and a magnetron assembly provided over the target component. The magnetron assembly may include a plurality of outer magnetrons and a plurality of inner magnetrons, and a spacing between each adjacent magnetrons of the plurality of outer magnetrons may be different from a spacing between each adjacent magnetrons of the plurality of inner magnetrons.

Apparatus and method of manufacturing interconnect structures

A Hall-Effect measure apparatus comprises a magnetic source, a wafer on a thermal chuck, a dc current source and a voltage meter. The magnetic source generates a magnetic field in a perpendicular position relative to the wafer. Furthermore, the magnetic field is targeted at a specific region of the wafer to be tested. By performing a Hall-Effect measurement and van der Pauw measurement, the carrier mobility of the specific region of the wafer can be calculated.

Hall-effect measurement apparatus

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Kaohsiung, Taiwan

Che-Hung Liu