Nuvoton Technology Corporation

Che-Hao Chiang

Szu-Wei Chang

Tu-Hsiu Wang

Wei-Chan Hsu

A successive approximation register analog-to-digital converter includes a comparator circuit, a capacitor group, an additional capacitor and a control circuit. The comparator circuit compares voltages at first and second input terminals thereof to generate a comparison result. The capacitor group and the additional capacitor are coupled to the first input terminal. The control circuit controls voltages of capacitors of the capacitor group according to the comparison result. In a first period, the control circuit provides a first voltage to the first input terminal and the additional capacitor, and provides an analog signal to the capacitors. In a second period, the control circuit stops providing the first voltage and controls a specific capacitor of the capacitor group to enter into a floating state. In a third period, the control circuit provides a second voltage to the additional capacitor. The second voltage is lower than the first voltage.

Successive approximation register analog-to-digital converter

A successive approximation register analog-to-digital converter including a first capacitor group, a second capacitor group and a control circuit is provided. Each of the first and second capacitor groups includes a plurality of capacitors coupled to a common node. In a sampling mode, the control circuit provides an analog signal to the first capacitor group and provides a first voltage to the common node and the second capacitor group. In a sampling mode, the control circuit stops providing the first voltage to the common node and provides a second voltage to the second capacitor group. In a data converting mode, the control circuit reads voltage values of the capacitors of the first capacitor group in sequence. Each when the voltage of at least one specific capacitor in the first capacitor group is read, one capacitor of the second capacitor group is electrically floated.

Successive approximation register analog-to-digital converter and control method thereof

A digital background calibration circuit including a digital random number generator, an analog-to-digital converter (ADC) and a plurality of switches is provided. The digital random number generator is configured to generate a first digital sequence having a plurality of bits. The ADC includes a plurality of sampling capacitors. The switches receive the first digital sequence and are coupled to the sampling capacitors. During a calibration period, the digital random number generator controls the sampling capacitors via the switches to sample the first digital sequence.

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Yuanlin, Taiwan

Che-Hao Chiang