Taiwan Semiconductor Manufacturing Comp. Ltd.

Che-fu Chen

Yan-Hong Liu

Ian Hsieh

Hsu Ming Hsiao

Hong Pin Lin

Wei-Hua Houng

Shiang-Bau Wang

Yi-Jen Chen

An Chyi Wei

Hung-Wen Chen

Ming-Jhe Sie

Hsiu-Hao Tsao

Daniel M Y Yang

Kung Shu Hsu

Ming-Feng Chen

Chien-Chih Wu

Kai-Chin Wei

Shen H Wang

Yan-hong Liu

Shen Wang

Meng-Chu Li

A method includes: transferring a wafer from a factory interface through a load lock chamber to a buffer chamber; transferring the wafer from the buffer chamber to a process chamber; etching the wafer in the process chamber, to remove a material of the wafer; and after the wafer is etched, performing reflectance measurements to the wafer in the factory interface, the load lock chamber, the buffer chamber, or combination thereof, to identify if the material of the wafer is removed entirely according to a reflectance of the wafer.

Wafer processing method

The present disclosure describes a chuck-based device and a method for cleaning a semiconductor manufacturing system. The semiconductor manufacturing system can include a chamber, a chuck housed in the chamber and configured to hold a substrate, and a control device configured to control a translational displacement and a rotation of the chuck. The chuck can include a passage extending along a periphery of the chuck and dividing the chuck into an inner portion and an outer sidewall portion, and a first multiple of openings through the outer sidewall portion of the chuck and interconnected with the passage. The passage can be configured to transport a fluid. The first multiple of openings can be configured to dispense the fluid.

Semiconductor cleaning apparatus and method

In a method of manufacturing a semiconductor device, a sacrificial gate structure including sacrificial gate electrode is formed over a substrate. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The recessing the first dielectric layer comprises a first etching operation and a second etching operation using a different etching as from the first etching operation.

Method of manufacturing a semiconductor device and a semiconductor device

The present disclosure describes an apparatus. The apparatus includes a chuck for placing an object thereon, a gas passage extending along a periphery of an outer sidewall of the chuck and separating the chuck into an inner portion and a sidewall portion, and a plurality of gas holes through the sidewall portion and configured to connect a gas external to the chuck to the gas passage.

Electrostatic chuck sidewall gas curtain

A method, for making a semiconductor device, includes forming a first fin over a substrate. The method includes forming a dummy gate stack on the first fin. The method includes forming a first gate spacer along a side of the dummy gate stack. The first gate spacer includes a first dielectric material. The method includes forming a second gate spacer along a side of the first gate spacer. The second gate spacer includes a semiconductor material. The method includes forming a source/drain region in the first fin adjacent the second gate spacer. The method includes removing at least a portion of the second gate spacer to form a void extending between the first gate spacer and the source/drain region.

Fin field-effect transistor with void and method of forming the same

A method includes positioning an end effector at a height lower than a height of a wafer. The end effector is moved to a position under the wafer. A wafer backside property of the wafer is detected by using a sensor on the end effector. The wafer backside property is analyzed to obtain an analysis result.

Robot arm device and method for transferring wafer

A system includes a factory interface, an etching tool, and at least one measuring device. The factory interface is configured to carry a wafer. The etching tool is coupled to the factory interface and configured to process the wafer transferred from the factory interface. The at least one measuring device is equipped in the factory interface, the etching tool, or the combination thereof. The at least one measuring device is configured to perform real-time measurements of reflectance from the wafer that is carried in the factory interface or the etching tool.

Reflectance measurement system and method thereof

In an embodiment, a robotic arm includes: a base; at least one link secured to the base; a gripper secured to the at least one link, wherein: the gripper comprises a finger, the gripper is configured to secure a wafer while the at least one link is in motion, and the gripper is configured to release the wafer while the at least one link is stopped, a sensor disposed on the finger, the sensor configured to collect sensor data characterizing the robotic arm's interaction with a semiconductor processing chamber while the wafer is secured using the finger.

Systems and methods for robotic arm sensing

The present disclosure describes a method that prevents pre-mature de-chucking in processing modules. The method includes placing a wafer onto a chuck equipped with lift pins. One or more of the lift pins include a pressure sensor configured to measure a pressure exerted by the wafer. The method further includes measuring a first pressure applied to the one or more lift pins by the wafer, lowering the lift pins to place the wafer on the chuck, and processing the wafer. The method also includes removing the wafer from the chuck by pressing the one or more lift pins against the wafer to measure a second pressure exerted by the wafer. If the measured second pressure is equal to the first pressure, the method raises the wafer using the lift pins above the chuck.

Wafer release mechanism

Systems, apparatuses, and methods are provided for predicting or determining irregular processing parameters during processing of a semiconductor wafer in a semiconductor processing apparatus, such as an etching apparatus. A semiconductor processing apparatus includes a load port that is configured to receive a semiconductor wafer. A process chamber is coupled to the load port, and a fan is configured to selectively vary a flow of fluid in the process chamber. One or more sensors are provided in the process chamber and are configured to sense one or more processing parameters in the process chamber. A controller is coupled to the one or more sensors and to the fan, and the controller is configured to control the fan to vary the flow of fluid in the process chamber based on the sensed one or more processing parameters.

Semiconductor processing flow field control apparatus and method

The present disclosure describes a chuck-based device and a method for cleaning a semiconductor manufacturing system. The semiconductor manufacturing system can include a chamber with the chuck-based device configured to clean the chamber, a loading port coupled to the chamber and configured to hold one or more wafer storage devices, and a control device configured to control a translational displacement and a rotation of the chuck-based device. The chuck-based device can include a based stage, one or more supporting rods disposed at the base stage and configured to be vertically extendable or retractable, and a padding film disposed on the one or more supporting rods.

Methods for cleaning semiconductor device manufacturing apparatus

A method includes transferring a wafer into a first process chamber of a cluster tool; performing a first process to the wafer in the first process chamber; transferring the wafer from the first process chamber to a second process chamber of the cluster tool after performing the first process; cleaning the first process chamber; performing a second process to the wafer in the second process chamber during cleaning the first process chamber.

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Taipei, Taiwan

Che-fu Chen