Taiwan Semiconductor Manufacturing Comp. Ltd.

Che-An Lee

Cheng Hung Lee

Hau-Tai Shieh

Chien-Yuan Chen

A memory device and a method of operating the memory device are disclosed. In one aspect, the memory device includes a bit line connected to a plurality of memory cells of a memory array, the bit line having a first length. The memory device includes a first programmable bit line having a second length determined based on a size of the memory array, and a charge sharing circuit connected to the bit line and the first programmable bit line. The charge sharing circuit is configured to transfer a charge from the bit line to the first programmable bit line. The memory device includes a discharge circuit connected to the first programmable bit line, the discharge circuit configured to discharge a stored charge in the first programmable bit line.

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Keelung, Taiwan

Che-An Lee