Taiwan Semiconductor Manufacturing Comp. Ltd.

United Microelectronics Corp.

Chau-neng Wu

Mu-Chun Wang

Shiang Huang-Lu

A protection device for preventing power-on sequence induced latch-up, which device is used in a power supply system having a first power supply and a second power supply wherein the voltage of the first power supply is higher than that of the second power supply. The protection device comprising: a voltage-drop circuit having an input terminal and an output terminal, the input terminal being connected to the first power supply; and inverter having an input terminal and an output terminal, the input terminal being connected to the output terminal of the voltage-drop circuit: a switching NMOS transistor with the gate connected to the output terminal of the inverter and the source connected to ground: and a variable capacitance circuit having a first capacitor and a second capacitor, the capacitance of the first capacitor being much larger than that of the second capacitor, the first terminal and the second terminal of the first capacitor being connected to the second power supply and the first terminal of the second capacitor respectively, the second terminal of the second capacitor being connected to ground, the common node of the second terminal of the first capacitor and the first terminal of the second capacitor being connected to the drain of the switching NMOS transistor, wherein the switching NMOS transistor and the variable capacitance circuit are formed on the same semiconductor substrate.

Protection means for preventing power-on sequence induced latch-up

A circuit for evaluating the asymmetric antenna effect of a transistor pair is provided, which can be implemented by using bipolar or complementary metal oxide semiconductor (CMOS) transistors to implement a differential amplifier, with which a pair of transistors Q,and Q,having similar characteristics are connected. The transistors Q,and Q,have a structure of, for example, one polysilicon layer and three metal layers, in which a second metal layer M,and a third metal layer M,are used for signal input, and metal layer M,close to the gate oxide layer of both the transistors Q,and Q,are used to obtain a differential antenna ratio. The differential amplifier comprises transistors Q,and Q,serving as an active load, and transistor Q,, which is used for adjusting the voltage gain.

Growing community of inventors

Hsinchu, Taiwan

Chau-neng Wu