Texas Instruments Corporation

Charles Robert Hewes

Dennis D Buss

Robert C Frye

Jerry D Holmes

Charles R Johnson

Alan Harry Katz

Allen S Jones

Dale J Mayer

A Modem utilizing process technology compatible CCD and IGFET circuits and sub-systems incorporated on a single I.C. chip. CCD transversal filters are employed as bandpass filters, being tuned for different modes of operation by adjustment of the clock frequency. The bandpass filters are operated in conjunction with a charge amplifier to remove d.c. offset from the analog output of the filters. The demodulator section of the Modem also incorporates low-pass filter employing switched resistors. The modulator section includes waveform generators based on a digital-to-analog converter including switched capacitors having values selected such that a sine wave having minimal distortion is generated when switched in proper sequence. Provision is made for digital inputs to control the frequency and amplitude of the sine wave output. The Modem can be operated under control of a microprocessor.

Charge coupled device filters and modems incorporating such filters

A one bit by N correlation digitally programmable filter comprising a multi-phase charge-transfer shift register whose phase are selectively clocked to achieve the programming. One phase is coupled to an integrator circuit that generates an output voltage proportional to the sum of the charged packets transferred. The clocking cycle is repeated sequentially to generate other selected summations. A plurality of correlators are utilized in parallel to perform an M bit by N correlation.

Charge-transfer programmable filter

Insulated gate field effect transistor charge regenerator amplifiers respectively cross-couple the output regions of a pair of two-phase CCD structures with the input regions of those structures. Each amplifier senses the level of binary data charge packets from the output region of one of the shift register structures and in response thereto applies a regenerated and inverted binary data charge packet to the input region of the other shift register structure. One of the amplifiers includes logic gating for inputting and outputting data into and from the shift register structure. A charge regenerator for a two-phase CCD structure comprising first and second shift registers. The charge regenerator comprises a source follower amplifier including a driver transistor, a load transistor and a positive feedback transistor connected between the gate and source of the driver transistor. The gate of the driver transistor is precharged to a predetermined level prior to sensing of the output region charge level and the regenerator inserts into the input region a charge packet corresponding to the data level sensed at the output region, without inversion.

Two-phase CCD regenerator - I/O circuits

An improved spread spectrum communication system having a transmitter subsystem and a receiver subsystem is disclosed. The transmitter subsystem comprises a data source of 50 bps rate which is modulo-2 added to a C/A (clear/acquisition) code of 1,023K chips/sec in an EXCLUSIVE OR gate, phase modulated on a carrier signal at about 154 f.sub.o where f.sub.o = 10.23 MHz in a phase shift keying modulator and transmitted. The receiver subsystem comprises an antenna for receiving the phase modulated signal, a plurality of filter/amplifier mixer stages for reducing the phase modulated signal to baseband, an in-phase CCD matched filter channel and a quadrature phase CCD matched filter channel for determining the presence of the C/A code and the phase of the incoming C/A code for synchronizing a replica of the C/A code with the incoming C/A code, a mixer for beating the replica C/A code signal with the C/A code signal, a Costas loop for automatic phase control, a sampler for sampling the baseband signal, an integrator for integrating the sampled signals, and a clocked comparator for comparing the integrated signals with a zero voltage at a 50Hz rate to demodulate the data code. Two embodiments of the CCD matched filter are disclosed. The first comprises a CCD having a length equal to five times the number of stages for each period of the C/A code. The second comprises a CCD transversal filter having a feedback loop for use in its transversal filter mode and in a recursive filter mode to enhance C/A code signals relative to noise.

Spread spectrum communication system

Homomorphic speech processing apparatus utilizing CCD implementation of the CZT algorithm for performing DFT and IDFT operations in extracting representations of formants and/or pitch data from sampled speech inputs. Embodiments also are described for performing the DFT and IDFT operations (a) by generating n-transforms and averaging the result and (b) for performing a sliding CZT transform. In a further embodiment, a smoothed spectrum of vocal tract data is obtained using a CCD filter with a low pass response. The CCD implementation includes transversal filters employing split-electrode signal amplitude weighting.

CCD speech processor

A charge coupled amplifier wherein an output voltage proportional to the difference between two input voltages is achieved through use of different value capacitances associated with the signal input and signal output structures of the amplifier. The input capacitance is defined in one embodiment using a doped substrate region beneath a biased electrode located between the signal input gates. In a modified structure, increased area input gate electrodes are used to define the input capacitance. A CCD transversal filter employing split electrode tap weighting which together with associated charge coupled input and output amplifiers form part of a single semiconductor chip.

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Dallas, TX, United States of America

Charles Robert Hewes