Lucent Technologies Inc.

At+t Corp.

Charles Raymond Miller

William G Burroughs

Malcolm Harold Smith

Ronald Lamar Freyman

Bruce W McNeill

Gary H Weiss

A memory access system is provided for accessing a first data unit and a second data unit in a single memory access cycle. The memory access system provides at least a memory, an even address decoding circuit, an odd address decoder, and shift logic. The memory is interleaved by at least one address bus signal into an even memory bank and an odd memory bank. The even memory bank and the odd memory bank are each organized by a plurality of corresponding rows. Each one of the rows contains at least one storage location for a data unit, with one address mapped to one storage location. The even address decoding circuit decodes an address bus signal supplied to the input terminal and activates an output terminal coupled to enable the given row of the even memory bank. The odd address decoder decodes the address bus signal to activate an output terminal coupled to enable the row of the odd memory bank in which the first data unit resides. The shift logic processes input signals indicating a mis-aligned access of multiple data units to produce a shift signal, and the even address decoding circuit is responsive to the shift signal to increment or shift the output terminal activated by decoding the address bus signal. The first data unit is made accessible by enabling the given row of the odd memory bank, and the second data unit is made accessible by enabling the next sequential row of the even memory bank.

RAM address decoding system and method to support misaligned memory

An integrated circuit includes topological features for weakening or otherwise modifying a blowable fuse in order to decrease the current needed to blow the fuse. This allows a decrease in the size of the circuit components which are needed to supply the current for blowing the fuse, in turn allowing compaction of the layout of the circuitry needed to blow the fuse. To this end, topological features are used to deform the shape of or otherwise modify the fuse, in turn increasing the resistance of the fuse or introducing flaws that allow the fuse to blow at a lower current.

Using topological features to lower the blowing current needed for fuses

There is disclosed an integrated circuit having a buffer that includes an output driver for receiving data and for transferring the data to an output node to be placed on a bus. The buffer also includes a pull-up control device coupled to the output node. The control device is capable of being switched between a first state that couples the output node to a predetermined logic level and a second state that does not couple the output node to the predetermined logic level. Control logic coupled to the pull-up control device receives first and second logic signals to control the state of the control device. With the second logic signal in a first predetermined level, the first logic signal is capable of switching the control device to the first state when in a first predetermined state and to the second state when in a second predetermined state. The second logic signal when in a second predetermined level overrides the control of the first logic signal to maintain the control device in the second state.

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Shickshinny, PA, United States of America

Charles Raymond Miller