The Boeing Company

Charles Muwonge

Young Kyu Song

Kyu-Pyung Hwang

Terry R Vogler

Amir Leon Liaghati

Eric Benjamin Delmonico

A method, computer program product, and computer system for identifying, by a computing device, a plurality of information associated with a telemetry system. A permutation matrix may be constructed for use with the telemetry system. One or more parameters for use in the permutation matrix may be extracted based upon, at least in part, the plurality of information associated with the telemetry system. A plurality of iterations may be performed with the permutation matrix based upon, at least in part, the one or more parameters extracted for use in the permutation matrix. A final telemetry geometry may be provided for the telemetry system.

Systems and methods for a telemetry interactive permutation matrix

In one or more embodiments, a method of manufacturing a high impedance surface (HIS) apparatus comprises patterning a first conducting layer on a core to form a first set of conducting pads, and patterning a second conducting layer on the core to form a second set of conducting pads. The method further comprises applying solder paste to each of the conducting pads of the second set of conducting pads. Also, the method comprises placing chip capacitors on the solder paste on the second set of conducting pads. In addition, the method comprises applying underfill between the chip capacitors. Also, the method comprises applying solder paste to each of the conducting pads of the first set of conducting pads. In addition, the method comprises placing chip inductors on the solder paste on the first set of conducting pads. Further, the method comprises applying underfill between the chip inductors.

Methods of manufacturing a high impedance surface (HIS) enhanced by discrete passives

In one or more embodiments, a high impedance surface (HIS) apparatus comprises a core; a first set of conducting pads, where a first side of the first set of conducting pads is connected to a first side of the core; and a second set of conducting pads, where a first side of the second set of conducting pads is connected to a second side of the core. The apparatus further comprises a plurality of chip inductors, where at least a portion of the chip inductors are connected to a second side of the first set of conducting pads; and a plurality of chip capacitors, where at least a portion of the chip capacitors are connected to a second side of the second set of conducting pads.

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Andover, MA, United States of America

Charles Muwonge