Harris Corporation

Charles Messmer

George S Bajor

Craig J McLachlan

Paul S Reinecke

John P Short

Stress is eliminated between a dielectrically passivated silicon wafer and a thick polycrystalline silicon layer by depositing a low melting transition layer such as a doped silica glass over the passivated silicon wafer.

Stress free dielectric isolation technology

Plane indicating moats are formed extending through an epitaxial layer into a substrate simultaneous with the formation of the isolation moats which terminate within the epitaxial layer. The substrate is ground to a predetermined thickness after formation of the dielectric isolation and support structure. The composite structure is inserted in an etchant with conditions set to electrochemically etch only the substrate. The exposed plane indicating moats are used as a reference for a final polishing step.

Growing community of inventors

Palm Bay, FL, United States of America

Charles Messmer