Data General Corporation

Network Integrity, Inc.

Charles J Holland

David I Epstein

Kenneth D Holberger

Steven Wallach

Carl J Alsing

Christopher W Midgely

Michael L Ziegler

James Marriot Guyer

Paul J Reilly

Michael B Druke

Richard W Coyle

Josh Rosen

John W Webb

Edward J Rasala

Manuel Gonsalves

Thomas West

An Integrity Server computer for economically protecting the data of a computer network's servers, and providing hot standby access to up-to-date copies of the data of a failed server. As the servers' files are created or modified, they are copied to the Integrity Server. When one of the servers fails, the Integrity Server fills in for the failed server, transparently providing the file service of the failed server to network clients. The invention provides novel methods for managing the data stored on the Integrity Server, so that the standby files are stored on low-cost media such as tape, but are quickly copied to disk when a protected server fails. The invention also provides methods for re-establishing connections between clients and servers, and communicating packets between network nodes, to allow the Integrity Server to stand-in for a failed server without requiring reconfiguration of the network clients.

Stand-in Computer file server providing fast recovery from computer file

An Integrity Server computer for economically protecting the data of a computer network's servers, and providing hot standby access to up-to-date copies of the data of a failed server. As the servers' files are created or modified, they are copied to the Integrity Server. The invention provides novel methods for managing the data stored on the Integrity Server, so that up-to-date snapshots of files of the protected file servers are stored on low-cost media such as tape, but without requiring that a system manager load large numbers of tapes.

Continuously-snapshotted protection of computer files

A data processing system in which macroinstructions are decoded to provide a sequence of microinstructions comprising one or more microroutines. A stack storage means stores data for use in such microroutines. The final microinstruction of the microroutines is a request to retrieve or remove data from the stack. When no data is present therein (the stack is empty) a new macroinstruction is requested and when data is present in the stack the microroutine returns to another mircoroutine in which it is acting as a micro-subsroutine to permit continuation of the other microroutine.

Microsequencer in a data processing system using stack storage for

A data processing system which handles thirty-two bit logical addresses which can be derived from either sixteen bit logical addresses or thirty-two bit logical addresses, the latter being translated into physical addresses by unique translation means. The system includes means for decoding macro-instructions of both a basic and an extended instruction set, each macro-instruction containing in itself selected bit patterns which uniquely identify which type of instruction is to be decoded. The decoded macro-instructions provide the starting address of one or more micro-instructions, which address is supplied to a unique micro-instruction sequencing unit which appropriately decodes a selected field of each micro-instruction to obtain each successive micro-instruction. The system uses hierarchical memory storage using eight storage segments (rings), access to the rings being controlled in a privileged manner according to different levels of privilege. The memory system uses a bank of main memory modules which interface with the central processor system via a dual port cache memory, block data transfers between the main memory and the cache memory being controlled by a bank controller unit.

Data processing system having a unique micro-sequencing system

A data processing system which handles thirty-two bit logical addresses which can be derived from either sixteen bit logical addresses or thirty-two bit logical addresses, the latter being translated into physical addresses by unique translation means. The system includes means for decoding macro-instructions of both a basic and an extended instruction set, each macro-instruction containing in itself selected bit patterns which uniquely identify which type of instruction is to be decoded. The instruction responsive apparatus thereof responds to unique microinstructions which, for example, provide for the selection of one of a plurality of interrupt routines each corresponding to an interrupt request from a different external device, provide for the sequential loading of a plurality of segment identification registers each pointing to selected memory management tables associated with a segment storage region of main memory, provide for a program counter relative jump operation, provide for zero-extending or sign-extending 16-bit words to 32-bit words having the same value, and provide for the multiplication of the lower 16 bits of two 32-bit accumulators and the sign-extension of the 16-bit result to form a 32-bit word.

Data processing system having instruction responsive apparatus for both

Data processing system

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Northboro, MA, United States of America

Charles J Holland