International Business Machines Corporation

Charles J Hendricks

Richard Philip Surprenant

Thomas Anthony Wassick

Kathleen M Wiley

David Clifford Long

Jon Alfred Casey

Mark J LaPlante

John H Keller

Krystyna Waleria Semkow

Brian Richard Sundlof

Robert Anthony Rita

Donald Rene Wall

Richard Francis Indyk

Paul F Bodenweber

Glenn A Pomerantz

James G Balz

Yuet-Ying Yu

Arthur Gilman Merryman

Michael Berger

Thomas Clarke Morrison

Jerome D Cohen

Brian J Wojszynski

Lori A Maiorino

Patrick E Spencer

Lee Chen

Laertis Economikos

Edward John Yarmchuk

Robert Hannon

Gangadhara Swami Mathad

Mukta S Farooq

Michael E Scaman

Robert Stephen Olyha, Jr

Arnold Halperin

Donald Merte

Brian H Desilets

Vincent P Peterson

Peter A Franklin

James Patrick Wood

Terence W Spoor

Philo B Hodge

Klaus Probst

Thomas Picunko

Ralph R Comulada

Robert N Wiggin

William W Hicks

Thomas A Gunther

Stephen J Tirch, Iii

Christopher W Cline

Frank C Seelmann

Siegfried Geyer

Roger M Eddy

Stanley J Poloncic

Vincent A Arena

A method and apparatus for the non-contact electrical test of both opens and shorts in electronic substrates. Top surface electrical test features are exposed to an ionization source under ambient conditions and the subsequent charge build up is measured as a drain current by probes contacting corresponding bottom surface features. Opens are detected by an absence of a drain current and shorts are detected by turning off the ionization source and re-measuring the bottom surface probes with a varying bias applied to each probe in the array.

Ionization test for electrical verification

A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Electronic package repair process

A system and method for utilizing a multi-probe tester to test an electrical device having a plurality of contact pads. Multi-probe tester test probes and electrical device contact pads are arrayed in a common distribution pitch, wherein at least one test probe is masked, thereby preventing the at least one test probe from returning a test result to the testing apparatus. In one embodiment mask membrane physically prevents at least one test probe from making contact with the electrical device. In another embodiment at least one software command is provided configured to cause an input from at least one test probe to be disregarded during a test routine. Another embodiment features both mask membrane and software command probe masking.

Method and system for testing multi-chip integrated circuit modules

A method and structure for an electronic circuit test and repair apparatus includes both of at least one wiring analyzer to locate circuit shorts and a current source to provide current sufficient to attempt to remove any identified shorts.

Interconnect package cluster probe short removal apparatus and method

Disclosed is an interposer and test structure for making contact between a substrate and a test bed. One embodiment of the interposer has a floating, rigid conductive element in a nonconductive body which makes temporary contact between the test bed and the substrate. In another embodiment of the invention, the interposer includes two layers of material, in which one layer includes pogo pins for contacting the substrate and the other layer includes pads for contacting the test bed. The pogo pins are on a grid spacing corresponding to that of the substrate input/output pads while the interposer pads are on a grid spacing corresponding to that of the pogo pin contactors of the test bed.

Interposer for maintaining temporary contact between a substrate and a test bed

A multilayer thin film structure (MLTF) is provided having no extraneous via-pad connection strap plated metallurgy for defective vias needing removal. The method for making or repairing the MLTF comprises determining interconnection defects in the MLTF at a thin film layer adjacent to the top metal layer of the structure, applying a top surface dielectric layer and forming vias in the layer, applying a metal conducting layer and removing the metal conducting layer for via-pad connection straps of defective vias and at the intersection of XY lines used in the repair, defining the top surface metallization including a series of orthogonal X conductor repair lines and Y conductor repair lines using a photoresist and lithography and then using a phototool to selectively expose the photoresist to define top surface strap connections needed to repair the interconnections and/or make EC's, and forming the top surface metallization using additive or subtractive metallization techniques.

Seed metal delete process for thin film repair solutions using direct UV laser

A system for testing circuit boards comprising a probe network having a plurality of probes wherein each probe is adapted for contacting an end of a corresponding circuit board network and wherein each probe and network define a node having an address. The system further comprises a control device that includes a node address generator and a timing circuit having an output for outputting a pulse to the node having the address generated by the node address generator and for coupling the remaining nodes to electrical ground. The system further comprises a comparator for comparing the pulse outputted by the timing circuit to predetermined data.

System for testing circuit board integrity

A laser tool for securing or removing a component from a semiconductor substrate includes a light-transmissive bonding tip having an opening to accommodate a central portion of the component inner and outer walls of the tip being coated with a light reflective material, a portion of the end of the tip being coated with a light absorptive material, so that peripheral areas of the component are locally heated by the tip to mount or remove the component.

Mounting and/or removing of components using optical fiber tools

An improved plasma reactor for uniformly etching a large number of semiconductor wafers at a reduced plasma potential includes, in one embodiment, a grounded plate mounted intermediate the cathode and the top plate of a reactor chamber, the top plate and the chamber walls forming the reactor anode. The grounded plate is spaced apart from the chamber top plate a distance sufficient to allow a plasma to be established between the grounded plate and the top plate, and the distance between the grounded plate and the cathode is large enough not to disturb the field in the proximity of the wafers being etched. The plate can be apertured to facilitate etchant gas flow. According to another embodiment of the invention at least two grounded plates are employed, spaced apart from each other and from the upper surface of the reactor plasma chamber.

Plasma etching reactor with reduced plasma potential

A high pressure, high etch rate single wafer plasma reactor having a fluid cooled upper electrode including a plurality of small diameter holes or passages therethrough to provide uniform reactive gas distribution over the surface of a wafer to be etched. A fluid cooled lower electrode is spaced from the upper electrode to provide an aspect ratio (wafer diameter: spacing) greater than about 25, and includes an insulating ring at its upper surface. The insulating ring protrudes above the exposed surface of the lower electrode to control the electrode spacing and to provide a plasma confinement region whereby substantially all of the RF power is dissipated by the wafer. A plurality of spaced apart, radially extending passages through the insulating ring provide a means of uniformly exhausting the reactive gas from the plasma confinement region. Affixed to the upper electrode is a first housing which supplies reactive gas and cooling fluid, and a baffle affixed to the first housing intermediate the upper electrode and a gas inlet forms a plenum above the upper electrode and ensures uniform reactive gas distribution thereover. The first housing and upper electrode are contained within a second housing with an insulating housing therebetween. The upper and lower electrodes are electrically isolated from each other and from ground, so that either or both electrodes may be powered.

Single wafer plasma etch reactor

A plasma enhancing baffle plate is employed in conjunction with the anode of an RIE system to provide uniform silicon etching. The baffle plate is conductively coupled to and provided in relatively close proximity to the anode to form a constricted chamber region between anode and baffle plate. With the constricted chamber open to the RIE chamber through aperture means in the baffle plate the total surface area of the anode is increased, such that when the system is biased to operate in an RIE mode an increase in the generation of neutral etching species is effected. Various aperture arrangements may be employed to provide different patterns of neutral etching species generation, in accordance with the peculiar characteristics of the system employed.

Modified RIE chamber for uniform silicon etching

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Wappingers Falls, NY, United States of America

Charles J Hendricks