Samsung Electronics Co., Ltd.

Ast Research, Inc.

Tele Digital Development, Inc.

Charles H Smoot, Iii

Ronald J Larson

Jeffry V Herring

Jean-Pierre Dupont

Richard Matysiak

Robert P Engfer

Joseph P Tretter, Iii

Hans Anderson

John Schuholz

Stephen E Hidem

A state machine bus controller for interfacing the CPU of a micro-computer based system with memory and I/O device is described. The controller, while capable of interfacing with a bus which is synchronous in nature, can maintain synchronous handshake with more than one type of microprocessor while providing function and timing parameters to satisfy requirements of an asynchronous bus and more than one type of device which reside on the bus.

State machine bus controller providing function and timing parameters to

A cellular telephone includes a receiver for receiving cellular communications and a transmitter for transmitting cellular communications. A controller is coupled to the receiver and the transmitter and controls the receiver and the transmitter based on the command signals. The controller includes a first memory for storing call rate information indicative of rates charged for the cellular communications. A timer provides a timer signal indicative of a time during which the cellular communications take place. The controller determines the amount of currency to be charged for the cellular communications based on the call rate information and the timer signal. An administrator station is provided for loading a threshold amount of currency into the cellular telephone. The entire system can be tracked and managed, and system wide statistics are available to the system operator.

Cellular telephone management system

State machine bus controller

Growing community of inventors

Orono, MN, United States of America

Charles H Smoot, Iii