Digital Equipment Corporation

Charles H Kaman

Daniel T Sullivan

James F O'Loughlin

Craig Mudge

George E Hitz

Jamshed R Kapadia

A processor in a data processing system comprising a plurality of units for performing various functions and at least one data bus interconnecting the units for transferring information therebetween. The processor also includes a control store for storing microprogrammed instructions which are directly coupled to the units of the processor for controlling the operation thereof. Certain ones of the microprogrammed processor instructions, which are utilized in the transfer of information between the units of the processor by means of the data bus, are also stored in a secondary control store whose contents are decoded by logic circuitry within the units of the processor which, in response thereto, couple the desired apparatus within the units to the data bus.

Processor for a data processing system

A writeable control store for storing a plurality of instructions used to control the operation of a processor in a data processing system. The control store may be utilized in a first mode wherein the instructions are accessed for controlling the operation of the processor and in a second mode wherein data is transferred to or retrieved from the control store. In the second mode of operation, a secondary control means is utilized to control the operation of the data transfers to and from the writeable control store.

Writeable control store for use in a data processing system

A data processing system is described herein having a central processor unit which responds to a plurality of diverse instructions including a diagnostic instruction. The diagnostic instruction is comprised of a first and second portion preferably in the form of distinct words which are separately transmitted to the processor from a peripheral storage location or manually transmitted from a control panel for the data processing system. The first word of the instruction, when decoded by the processor, identifies the diagnostic instruction and the second word specifies the particular function to be performed. The processor is arranged such that, in the response to the first word of instruction, the second word is coupled to a specialized decoding circuit which will generate a starting address in the microprogrammable control store of the processor for a routine to execute the function specified by the second word. Utilization of the diagnostic instruction in conjunction with other instructions for moving data to or reading data from an addressable storage register within the processor permits numerous diagnostic and testing functions to be performed such as, for example, the reading and writing of internal state registers which are not addressable at the programmer's level; the executing of selected portions of the microcode in the microprogrammable control store and the operation of the cache memory.

Growing community of inventors

Newton Highlands, MA, United States of America

Charles H Kaman