Rockwell International Corporation

Charles E Huffman

Stephen R Southerland

Robert J McGuire

Paul E Pepmiller

John W Waddill

Richard L Majefski

Herbert E Welch

Jeffrey L Foust

When a digital muldem employs protective switching, a requirement exists to perform revertive switching. The present disclosure illustrates a way to test the failed module after a switch to determine whether the module is actually failed or the decision to switch was based on momentary external conditions. The test is accomplished by looping back the 'failed' module, passing data from one of the operative channels through the 'failed' module and doing a bit by bit compare of input and output data for identity. If all of the muldems convert signals to a common frequency, only a single compare circuit need be used on a multiplexed basis.

Channel looping apparatus for failure analysis

Actual customer data is routed through a composite muldem which comprises a high speed section and a plurality of low speed sections with the signals being switched or transferred between the high speed and low speed sections all at a common frequency. This same customer data is then tested by a bit by bit comparison circuit which tests the data after it is split, rerouted in various datapath configurations and compared in a logical fashion to first detect datapath failure and then isolate the failure to a specific part of the composite muldem by a set of logical deductions.

Method of and apparatus for checking datapath failure in a communication

An interface device for use between a North American PCM channel bank and a CCITT PCM channel bank which allows data to stay in digital format rather than being converted to voice frequency. The interface takes care of not only the completely different serial data rates, but the different transfer characteristics of the channel data words. Synchronization is obtained by dividing the serial data stream into enough channel banks so that there is less than one-half cycle time period difference between the frequency of the incoming and outgoing data streams for one cycle of channel data words.

PCM data translating apparatus

The present invention provides error checking for data dependent coding circuitry which checking is complicated by a considerable amount of circuitry which is activated only when the incoming data conforms to specific requirements (i.e., three or more consecutive logic zeros). Except for these occurrences, the output from the coding circuitry is straightforward representation of the nonreturn to zero input data. The present invention uses a straightforward detecting circuit to normally pass the data and a data compare circuit which compares the output of the detector with the output of the data dependent circuitry except for times when the specific condition of three consecutive logic zeros occurs. At that time, the data compare circuitry checks to make sure that both the code detector and the encoding circuit have detected the occurrence of this condition. Since the encoding circuitry has been working up to that time, it may be properly assumed that all of the circuitry is working properly and no error code is generated until either the straightforward data compare or the special condition detection fails to compare.

Error detection apparatus for data dependent coding circuitry

A circuit approach is illustrated for simplifying a count divider circuit by applying selected outputs of the counter to a J-K flip-flop as input to the J-K terminals whereby a comparatively high speed response is returned for presetting the counter as compared to the prior art approach which either required much more circuitry or intolerable time delays.

Clock divider circuit incorporating a J-K flip-flop as the count logic

The overhead format for DS1C data must be removed and the data broken into two DS1 format data signals before being transmitted over DS2 or DS3 transmission lines. The present invention demonstrates a method whereby the stuff bit code for appropriate frames of a high speed transmission line can be violated and remotely detected whereby the signal is looped back at the destination end of the desired signal whether the remote signals are in the DS1C or DS1 data format.

Apparatus for providing loopback of signals where the signals being

A drop and insert channel bank is provided for receiving data from and inserting data onto a multichannel digital transmission line, such as a microwave radio link, between end terminals. The channel bank has a plurality of single channel units which share common equipment, including a receiver and a transmitter from and to the transmission line and a switching unit therebetween. The switching unit includes user controlled selection circuitry enabling any channel on the line to be dropped to any of the channel units, and enabling any channel to be inserted on the line from any of the channel units. Through-traffic passes through the receiver, switching unit and transmitter of the channel bank in digital form without conversion to and from analog form. Unidirectional and bidirectional modes are disclosed, including various forms of each.

Drop and insert channel bank with reduced channel units

A synchronization system for data coupling apparatus is provided by delaying clocked frame identification signals instead of delaying the data in data buffer storage. Data is passed between input and output transmission lines with only the inherent delay incurred in the requisite data manipulation therebetween. The framing alignment information extracted at the input is connected to the output through a delay such that the data and framing identification signals arrive at the output at the same time and in synchronous alignment. In addition to eliminating the need for a data buffer, the system also eliminates the need for a second identification bit alignment location derivation from the output. The system utilizes an edge-aligned clock which enables substitutional insertion of data to a desired location in the bit stream.

Synchronous coupling of framed data in digital transmission

In a digital transmission system, a loop-timing technique is provided for a channel bank which demultiplexes a high speed data stream into a plurality of lower rate channels, and which multiplexes a plurality of lower rate channels to a high speed data stream. Loop-timing is provided without elastic buffers by deriving stuff requests from stuff bits in the received high speed data stream, extracting a high speed clock signal from the received data stream, and applying the stuff requests and the high speed clock signal directly to the high speed multiplexer for providing stuff bits in the transmitted high speed data stream and for clocking the transmitted high speed data stream.

Non-buffered loop-timed channel bank

A time division demultiplexer is provided which reassigns clock positions to the various channels in a serial data stream such that different data bit positions may be assigned to a channel. This enables each channel to be independent. A single channel can access any data bit position in the serial data stream, and several or all the channels can access the same data bit position.

Time division demultiplexer with independent data distribution

A concept is illustrated for protecting active components in a multiline repeater station switching system to a state of 'fail operability'. This is accomplished by dividing the signal received on the single spare IF transmission line into IF and baseband signals and applying the divided set of signals to two spare switches. Thus, there is provision for using the spare line as either a repeat line staying at the IF frequency or as a drop line at baseband frequency. The same concept is used in the transmit portion wherein the output of two spare switches is combined to be transmitted over a single IF line. Thus, the single line can be used to input either a repeated IF signal or an insert baseband signal. A further concept of the invention is to make both the IF and baseband switching modules identical in electrical contact construction so that the multiline switch can be easily altered into any desired set of repeat and drop or insert combinations.

Multiline switching protection apparatus

The present invention is directed to a system which accomplishes forwarding or retransmission of signals requiring preemphasis and signals not requiring preemphasis while using a single spare channel for forwarding either type of signal upon failure of a primary channel. This is accomplished by designing each channel to have passive and selectable circuits through which the signal is passed for preemphasis or attenuation depending upon the type of signal used in the primary portion of that communication channel before being applied to the selection switches of the spare channel.

Multiline switch

Apparatus for testing the operability of a signal translation means which passes signal information containing a definable and repeatable characteristic such as a synchronization signal through the use of a spare similar device and a demodulating device which provides outputs upon detecting the signal passed by each signal translating device. As illustrated, regular and spare transmit multiplexing devices are used and logic information obtained from a spare receiver is used to indicate a failed condition.

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Plano, TX, United States of America

Charles E Huffman