Cray Incorporated

Microsoft Technology Licensing, LLC

University of Notre Dame Du Lac

Charles David Callahan, Ii

Brian D Koblenz

Gail A Alverson

Burton Jordan Smith

Susan L Coatney

Richard D Korry

Simon H Kahan

Allan Porterfield

John Joseph Duffy

Edward George Essey

Paul F Ringseth

Yosseff Levanoni

Weirong Zhu

Lingli Zhang

Preston Pengra Briggs

Keith Arnett Shields

Laurence S Kaplan

David Tennyson Harper, Iii

David L Detlefs

Stephen Harris Toub

Michael M Magruder

Dana D Groff

Peter M Kogge

Rick Molloy

Sukhdeep S Sodhi

Jay B Brockman

Bill Messmer

A query that identifies an input data source is rewritten to contain data parallel operations that include partitioning and merging. The input data source is partitioned into a plurality of initial partitions. A parallel repartitioning operation is performed on the initial partitions to generate a plurality of secondary partitions. A parallel execution of the query is performed using the secondary partitions to generate a plurality of output sets. The plurality of output sets are merged into a merged output set.

Partitioning and repartitioning for data parallel operations

A query that includes a search operator and that identifies an input data source is received. The input data source is partitioned into a plurality of partitions. A parallel search through the partitions is performed for an element that could halt the search. The parallel search is performed using a plurality of parallel workers. One of the parallel workers generates a notification when the element is found by that worker. The notification notifies the other parallel workers that the search could be halted. Each of the parallel workers generates an output set based on results of the search. The output sets are merged into a merged output set.

Data parallel searching

Methods and systems for statistically eliding fences in a work stealing algorithm are disclosed. A data structure comprising a head pointer, tail pointer, barrier pointer and an advertising flag allows for dynamic load-balancing across processing resources in computer applications.

Fence elision for work stealing

A method to exchange data in a shared memory system includes the use of a buffer in communication with a producer processor and a consumer processor. The cache data is temporarily stored in the buffer. The method includes for the consumer and the producer to indicate intent to acquire ownership of the buffer. In response to the indication of intent, the producer, consumer, buffer are prepared for the access. If the consumer intends to acquire the buffer, the producer places the cache data into the buffer. If the producer intends to acquire the buffer, the consumer removes the cache data from the buffer. The access to the buffer, however, is delayed until the producer, consumer, and the buffer are prepared.

Management of ownership control and data movement in shared-memory systems

A high level programming language provides an extensible set of transformations for use on indexable types in a data parallel processing environment. A compiler for the language implements each transformation as a map from indexable types to allow each transformation to be applied to other transformations. At compile time, the compiler identifies sequences of the transformations on each indexable type in data parallel source code and generates data parallel executable code to implement the sequences as a combined operation at runtime using the transformation maps. The compiler also incorporates optimizations that are based on the sequences of transformations into the data parallel executable code.

Indexable type transformations

A software transactional memory (STM) system allows the composition of traditional lock based synchronization with transactions in STM code. The STM system acquires each traditional lock the first time that a corresponding traditional lock acquire is encountered inside a transaction and defers all traditional lock releases until a top level transaction in a transaction nest commits or aborts. The STM system maintains state information associated with traditional lock operations in transactions and uses the state information to eliminate deferred traditional lock operations that are redundant. The STM system integrates with systems that implement garbage collection.

Composition of locks in software transactional memory

Described herein are techniques for generating invocation stubs for a data parallel programming model so that a data parallel program written in a statically-compiled high-level programming language may be more declarative, reusable, and portable than traditional approaches. With some of the described techniques, invocation stubs are generated by a compiler and those stubs bridge a logical arrangement of data parallel computations to the actual physical arrangement of a target data parallel hardware for that data parallel computation.

Compiler-generated invocation stubs for data parallel programming model

A parallel execution of a query is performed with a plurality of producers using a partitioned data source, thereby producing output data. The output data is consumed with at least one consumer. The at least one consumer is monitored. A determination is made whether to stop producing output data by at least one of the producers prior to completion of the execution of the query based on the monitoring.

Data parallel production and consumption

Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.

Synchronization techniques in a multithreaded environment

A system for conducting performance analysis for executing tasks. The analysis involves generating a variety of trace information related to performance measures, including parallelism-related information, during execution of the task. In order to generate the trace information, target source code of interest is compiled in such a manner that executing the resulting executable code will generate execution trace information composed of a series of events. Each event stores trace information related to a variety of performance measures for the one or more processors and protection domains used. After the execution trace information has been generated, the system can use that trace information and a trace information description file to produce useful performance measure information. The trace information description file contains information that describes the types of execution events as well as the structure of the stored information. The system uses the trace information description file to organize the information in the trace information file, extracts a variety of types of performance measure information from the organized trace information, and formats the extracted information for display. The system can use default or user-defined functions to extract and format trace information for display. After the system displays one or more types of performance measure information, a user of the system can then interact with the system in a variety of ways to obtain other useful performance analysis information.

Parallelism performance analysis based on execution trace information

Embodiments of the present invention provide a class of computer architectures generally referred to as lightweight multi-threaded architectures (LIMA). Other embodiments may be described and claimed.

Computer systems with lightweight multi-threaded architectures

Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evalution of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of fowarding to avoid checking for an end of a buffer, use of sentinel work to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.

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Seattle, WA, United States of America

Charles David Callahan, Ii