Qualcomm Incorporated

Charles D Tuten

Marko Harry Koski

Joseph Duncan

Aniruddha Bashar

Todd Robert Sutton

Guolei Yu

Ajay Kumar Kosaraju

The present disclosure describes aspects of power regulation with charge pumps. In some aspects, an integrated circuit (IC) includes multiple processor cores and a power input connected to an internal power rail of the IC. The IC may also comprise embedded charge pumps coupled between the internal power rail of the IC and respective input power rails of the multiple processor cores. Capacitors of the embedded charge pumps may be implemented with on-die capacitors suitable for integration with a die of the circuit to facilitate the embedding of the charge pumps. Alternately or additionally, separate input power rails of the processor cores and the embedded charge pumps may enable more-efficient power regulation or power management on a per-processor core basis, such as when a processor core is throttled or idled to reduce power consumption.

Power regulation with charge pumps

The present disclosure provides a duty locked loop circuit that includes a switch network including a first electronic switch device controlled by a first control signal that is based on a first input signal and a second electronic switch device controlled by a second control signal that is based on a second input signal. The duty locked loop circuit includes an integrator circuit electrically connected to the switch network. The integrator circuit is configured to generate an output voltage proportional to an integral of a difference between a first duty cycle of the first input signal and a second duty cycle of the second input signal. The duty locked loop circuit includes an output circuit configured to generate an output signal having an output duty cycle that is based on the output voltage.

Duty locked loop circuit

Certain aspects of the present disclosure provide an apparatus for noise cancellation. One example apparatus generally includes a first delay path and a second delay path, each providing signals generated by applying a different delay to an input signal, and a first comparator having a first input coupled to the first delay path and a second input coupled to the second delay path. The apparatus also includes a switching circuit having a control input coupled to an output of the first comparator, the switching circuit configured to selectively couple the first delay path or the second delay path to an output node of the switching circuit based on a signal at the control input. The apparatus also includes an attenuation circuit having a first input coupled to an input path for providing the input signal, and a second input coupled to the output node of the switching circuit.

Repetitive noise cancelation

Features and advantages of certain embodiments include a plurality of power supplies that work together to deliver power to a target circuit. In one embodiment, a downstream power supply provides a fast current delivery in response to load current transients and generates a feedback signal to control an upstream power supply so that the upstream and downstream power supplies work together to meet the current and voltage requirements of a target circuit across a wide range of loading conditions.

Power supplies with feedback

Exemplary embodiments are related to a switching power converter. A device may include a switching unit configured to receive an input voltage and convey an output voltage. The device may further include a feedback path including a pulse-width modulator having an input directly coupled to the output voltage and configured to convey a signal to the switching unit.

Switching power converter

Exemplary embodiments are related to generating an error correction voltage and/or a compensation voltage based upon pulse-width modulation information. A device may include a pulse-width modulator configured to receive a first input voltage and convey a modulated output voltage. The device may also include a filtering unit including at least one filter configured to receive the modulated output voltage, generate at least one of an error correction voltage and a compensation voltage, and convey a second input voltage to the pulse-width modulator based on at least one of the error correction voltage and a compensation voltage.

Transfer function generation based on pulse-width modulation information

Exemplary embodiments are related to a switching voltage regulator. A device may include a first transistor having a gate configured to receive a first signal and a second transistor having a gate configured to receive a second signal. The device may also include a controller configured to measure at least one of a difference between a rising edge of the first signal and an associated rising edge of the second signal and a difference between a falling edge of the first signal and an associated falling edge of the second signal. The controller may also be configured to delay one of the first signal and the second signal if the rising edge of the first signal occurs before or after the associated rising edge of the second signal or if the falling edge of the first signal occurs before or after the associated falling edge of the second signal.

Adaptive switching voltage regulator

Exemplary embodiments are related to a switching voltage regulator. A switching voltage regulator may include a current limit detector configured to detect an over-current condition. The switching voltage regulator may further include a pulse-width modulation (PWM) module coupled to the current limit detector and configured to convey a PWM signal based on a programmed switching frequency and an output voltage and in response to the over-current condition.

Switching voltage regulator

A power supply is described. The power supply includes a synchronous sampled comparator. The synchronous sampled comparator includes a first input that receives a reference voltage. The synchronous sampled comparator also includes a second input that receives a feedback signal. The power supply also includes power field effect transistors (FETs). The power supply further includes an inductor coupled to the power FETs and coupled to the second input. The power FETs generate a power supply voltage using the inductor. The power supply voltage is a direct current (DC) power supply voltage.

Growing community of inventors

Chandler, AZ, United States of America

Charles D Tuten