Motorola Corporation

Intel Corporation

Charles Christopher Hill

John H Kelly

Henry Wong

Naufel Chafic Naufel

Mark S Lanus

Harold K Williamson

Sabina J Houle

Daewoong Suh

Sriram Muthukumar

Douglas L Sandy

Ralph E Snowden

David J Halliday

Brian A Carr

Anil Gupta

Ralph Lane

Dale C Blankenship

Dennis E Liles

Kevin Loutfy

Chandrasekhar Ramaswamy

Edward Greenwood

Patrick Dunaway

Rajesh Mangal

James Holbrook

A microelectronic package is provided. The microelectronic package includes a substrate, a die coupled to a top surface of the substrate and a integrated heat spreader thermally coupled to the die, wherein the integrated heat spreader comprises integrated heat spreader walls. The microelectronic package also includes a thermal interface material disposed between the die and the integrated heat spreader and an underfill material disposed between the integrated heat spreader and the substrate, wherein the underfill material is disposed within gaps between the integrated heat spreader walls, the die and the thermal interface material.

Microelectronic package with high temperature thermal interface material

A compliant interconnect is described that is useful for coupling semiconductor dies to other components. In one embodiment, the interconnect includes a base to couple to a first component and an arch extending from and integral with the base to couple to a second component. The interconnect may be formed by coating a substrate with photoresist, exposing the photoresist with a defined pattern, developing the photoresist, baking the photoresist at a first temperature for a first amount of time to reflow the photoresist, and baking the photoresist at a second higher temperature for a second amount of time to reflow the photoresist.

Compliant interconnects for semiconductors and micromachines

In a distributed switch fabric network () having a first node () having a first node transceiver port () and a second node () having a second node transceiver port (), link level flow control () operating between the first node transceiver port and the second node transceiver port to in response to a congestion condition () in the second node transceiver port, wherein the link level flow control suspends transmission of one of a plurality of priority levels of packets () on a channel from the first node transceiver port to the second node transceiver port. The one of the plurality of priority levels of packets accumulates in one of a plurality of a transmit buffers () of the first transceiver port, where the one of the plurality of transmit buffers corresponds to the one of the plurality of priority levels of packets. Per-flow flow control () operates to modify transmission of the one of the plurality of priority levels of packets to the transmit buffer if the transmit buffer reaches a transmit threshold value (). Link level flow control operates transparently to a traffic manager () of the first node if the congestion condition occurs and the one of the plurality of transmit buffers fails to reach the transmit threshold value.

Method of quality of service based flow control within a distributed switch fabric network

Flow control in a distributed switch fabric () includes detecting at least one of a congestion condition () in a downstream transceiver port () and an oversubscribing condition () of a channel buffer (), where the downstream transceiver port () and the channel buffer () both correspond to a channel () of a traffic manager (). Packets begin accumulating in the channel buffer (). Per-flow flow control () operates to modify transmission of the packets over the channel () to the channel buffer () if the channel buffer () reaches a threshold value (). Link level flow control () operates transparently to the traffic manager () if the congestion condition () is detected and the channel buffer () fails to reach the threshold value ().

Method of flow control

An improved system and technique for processing a communications session in a data communications system suitably includes the steps of receiving the communications session at a line interface card, embedding the communications session into an asynchronous transfer mode (ATM) virtual circuit at the line interface card, transporting the virtual circuit from the line interface card to a processor card via a backplane. The processor card suitably extracts the communications session from the virtual circuit, and processes the communications session as appropriate.

Communications system embedding communications session into ATM virtual circuit at line interface card and routing the virtual circuit to a processor card via a backplane

Embodiments of a method of forming a tapered via using a receding mask are disclosed. In one embodiment, an etch mask formed on a substrate includes a first aperture in a first photoresist layer and a second, larger aperture in an overlying second photoresist layer. Peripheries of the first and second apertures may be tapered as a result of an out-of-focus exposure. An etching process may be performed to create a tapered via in the substrate, and during this etching process, the first, relatively thinner photoresist layer will recede outwardly toward the aperture in the second photoresist layer. Other embodiments are described and claimed.

Method of creating a tapered via using a receding mask and resulting structure

An integrated power supply air inlet unit () coupled to slidably insert into a first interspace region () of an embedded computer chassis (), where the first interspace region is defined by a module portion (), a rear surface () and a first side surface (), includes a power supply () coupled to supply power to the embedded computer chassis, and a front surface () that is substantially perpendicular to the first side surface. A cooling air mass () is drawn into the embedded computer chassis through the front surface in a direction substantially perpendicular () to the front surface, where upon entering the integrated power supply air inlet unit the cooling air mass is turned substantially ninety degrees to flow over the module portion in a direction substantially parallel the front surface, and where the integrated power supply air inlet unit is hot-swappable in the embedded computer chassis.

Integrated power supply and air inlet unit

A method of directly transferring data across a CompactPCI&#x2122; backplane () via a fully meshed orthogonal network (). The CompactPCI backplane () incorporates a different type connector at its Plocation, in conjunction with a standard family of IEC 61074 connectors at its PPPand Plocations, to provide high speed data transfer with additional shielding and noise control.

Compact PCI backplane and method of data transfer across the compact PCI backplane

A multi-service platform system () includes a rear transition module () coupled to receive a DSX signal () and a payload node () coupled to the rear transition module via a backplane (), where the payload node is coupled to process the DSX signal. A secondary payload node () is coupled to secondary rear transition module () via the backplane. A protection bus () couples the rear transition module to the secondary rear transition module outside the backplane, where failure of the payload node operates to shunt the DSX signal through the rear transition module to the secondary rear transition module. Failure of the payload node operates to switch processing of the DSX signal from the payload node to the secondary payload node, and the secondary rear transition module independently controls shunting of the DSX signal through the rear transition module to the secondary rear transition module.

Method and apparatus for bypassing a payload node

A method of directly transferring data across a CompactPCI&trade; backplane ( ) via a fully meshed orthogonal network ( ). The CompactPCI backplane ( ) incorporates a different type connector at its P location, in conjunction with a standard family of IEC 61074 connectors at its P , P , P , and P locations, to provide high speed data transfer with additional shielding and noise control.

A power system includes a cable connector ( ), a cable ( ) comprised of a plurality of wires ( , and ), and a circuit ( , or ) for sensing a connection for the cable connector. The circuit is located adjacent to the cable connector and is capable of sensing a predetermined connection condition of the connection of the cable connector. Each wire has an end located within the cable connector.

Power system and method of operation

In a method for switching between multiple system hosts (,) on a CompactPCI bus (,), a hot swap controller (,) provides to a special arbiter (,) a high priority request signal and the special arbiter (,) provides to the hot swap controller a grant signal only when the CompactPCI bus is idle. The hot swap controller (,) provides to the special arbiter (,) a float signal causing the special arbiter (,) to disable the system host signals, which include one or more grant signals for granting bus access to devices on the CompactPCI bus (,), one or more reset signals for resetting the devices, one or more interrupts and one or more clock signals provided to devices. The hot swap controller (,) transfers control of the CompactPCI bus (,) to a standby system host,).

Method for switching between multiple system hosts

In a method for swapping a system host board (150,160,170,180), when a failure is detected on a first system processor board (150), control of a first CompactPCI bus (110) is transferred from a first system processor board system host (154) to a first bridge board system host(164). In an active/standby configuration, control of a second CompactPCI bus (120) is transferred from a second bridge board system host (184) to a second system processor board system host (174), and control of the devices on the first CompactPCI bus (110) and second CompactPCI bus (120) is transferred from the first system processor (152) to the second system processor (172) without resetting any devices on the system.

Growing community of inventors

Gilbert, AZ, United States of America

Charles Christopher Hill