Anue Systems, Inc.

Agere Systems Inc.

Lucent Technologies Inc.

Keysight Technologies Singapore (holdings) Pte. Ltd.

Charles Albert Webb, Iii

Himanshu Mahendra Thaker

Lesley Jen-Yuan Wu

Michael Samuel Shaffer

Gregory S Hilton

Ronald A Pleshek

Keith E Cheney

Patricia A Abkowitz

Kishan Shenoi

Arun K Thakkar

Mohammad Shafiul Mobin

Chih-Lin I

Christopher C Ott

Andrzej F Partyka

Hong Jiang

Howard C Huang

Stephan Ten Brink

Cecil William Farrow

Ahmad Khalid Aman

Agesino Primatic, Jr

Lesley J Wu

Stefan Jan Johansson

Shardendu Pandey

David W McGhee

Joshua D Karnes

Andrew Morton Spooner

Nevin R Jones

Richard G Jeske

Scott A Harper

Keith E Chaney

Jason C Nutt

Simon A Mackenzie

Franz J Weller

Systems and methods are disclosed for utilizing slave (receive) time-stamp clock rates that are different from master (sender) time-stamp clock rates to randomize and thereby reduce systematic time-stamp granularity errors in the communication of network packets. The slave (receive) time-stamp clock rate for some embodiments is set to be a fixed value that has a relationship with the master (sender) time-stamp clock rate such that the ratio of the slave (receive) clock rate to the master (sender) clock rate is a rational number. Other embodiments use a time-varying frequency for the slave (receive) time-stamp clock rate to randomize the slave (receive) time-stamp clock with respect to the master (sender) time-stamp clock. Additional time-stamps can also be generated using a slave (receive) time-stamp clock having a rate set to equal the rate of the master (sender) time-stamp clock signal. Further spread spectrum and/or delta-sigma modulation techniques can be applied to effectively randomize the slave (receive) time-stamp clock.

Systems and methods utilizing randomized clock rates to reduce systematic time-stamp granularity errors in network packet communications

Systems and methods are disclosed for direct passive monitoring of packet delay variation and time error in network packet communications. Packets traversing between slave and master clocks are monitored to provide direct results of the actual conditions without the need to rely upon inference determinations. Certain embodiments provide tap configurations to monitor packet flows, while certain other embodiments provide in-line configurations to monitor packet flows. Certain further embodiments provide multiple monitoring devices that can be used for passive monitoring purposes, such as passive monitoring to test boundary clock. These multiple monitoring devices can be configured to be within a single or different test instruments. Other variations are also described.

System and method for direct passive monitoring of packet delay variation and time error in network packet communications

Systems and methods are disclosed for monitoring network synchronization. The disclosed embodiments utilize time window snapshots to capture network time information and compare the captured time information against time reference information to determine network time errors. These network time errors can then be analyzed with respect to selected operating parameters and tolerances to determine network synchronization errors and to generate alarms. Certain embodiments are configured to capture time information data and to analyze this captured data locally to determine time error data. Certain other embodiments are configured to utilize multiple capture devices and to transmit time error data to a central snapshot synchronization monitor. The central snapshot synchronization monitor can also communicate control information to the capture devices to control the snapshot time windows. In addition, synchronization errors can be used as trigger events to cause additional capture of time information by other capture devices.

System and method for monitoring network synchronization

Systems and methods are disclosed for unified systems of network tool optimizers (NTOs). A NTO supervisor device controls switch fabric circuitry to interconnect a plurality of NTO member devices so that packets received at a source port for one NTO member device can be output to a destination port for a different NTO member device. The NTO supervisor device is further configured to analyze filters for the NTO member devices and to generate filter rules for forwarding packets among the various NTO member devices using the switch fabric circuitry. Further, additional secondary NTO supervisor devices can also be included within the unified NTO system to further expand the system. As such, a plurality of NTO member devices are managed and controlled by one or more NTO supervisor devices to form a highly scalable and efficient unified NTO system.

Unified systems of network tool optimizers and related methods

Systems and methods are disclosed that allow for improved management and control of packet forwarding in network systems. Network devices and tool optimizers and a related systems and methods are disclosed for improved packet forwarding between network sources and destination tools in a network monitoring environment. The network devices and tool optimizers disclosed can include a graphical user interfaces (GUIs) through which a user can create and modify filters and select associated filter criteria for forwarding packets from input ports to output ports. The network devices and tool optimizers can also automatically generate filter rules and apply them to the appropriate filter engines so that packets are forwarded as desired by the user. The GUI can be configured to provide other features as well.

Filtering path view graphical user interfaces and related systems and methods

Systems and methods are disclosed that allow for improved management and control of packet forwarding in network systems. Network devices and tool optimizers and a related systems and methods are disclosed for improved packet forwarding between input ports and output ports. The input ports and output ports are configured to be connected to source devices and destination devices, for example, network sources and destination tools in a network monitoring environment. The network devices and tool optimizers disclosed can use a packet processing system whereby forwarding behavior is governed by matching packets in parallel against multiple user-specified packet filtering criteria, and by performing forwarding actions associated with all such matching filter criteria. The multi-action packet forwarding can be implemented using hardware configured to directly provide multi-action packet forwarding and/or hardware configured to provide single-packet-forwarding that has been subsequently configured using filter engines to provide multi-action packet forwarding.

Automatic filter overlap processing and related systems and methods

Systems and methods are disclosed for precise generation of phase variation in digital signals. The disclosed signal generation embodiments generate a pattern of information bits that represents a digital signal with desired phase variations and transmit this digital pattern at high speed utilizing a serializer to generate a high speed bit stream. The high speed bit stream can be used to generate one or more digital signals, such as clock signals, having desired rates and desired phase variations. In certain embodiments, the desired phase variation can be introduced into the resulting digital signal by removing and/or inserting bits in a digital pattern thereby moving logic transitions (e.g., rising edge transitions, falling edge transitions) as desired within the resulting digital signal. In addition to clock signals, the resulting digital signals generated can be control signals, data signals and/or any other desired digital signal.

Systems and methods for precise generation of phase variation in digital signals

Systems and methods are disclosed that allow for improved management and control of packet forwarding in network systems. Network devices and tool optimizers and a related systems and methods are disclosed for improved packet forwarding between input ports and output ports. The input ports and output ports are configured to be connected to source devices and destination devices, for example, network sources and destination tools in a network monitoring environment. The network devices and tool optimizers disclosed can use superset packet forwarding, such that ingress filter engines are configured with ingress filter rules so as to forward a superset of packets to output ports associated with overlapping filters. Egress filter engines are configured with egress filter rules to then determine which of the superset packets are actually sent out the output ports.

Superset packet forwarding for overlapping filters and related systems and methods

Systems and methods are disclosed for playback of detected timing events with detected phase variations. Disclosed signal generation embodiments can be used to generate digital signals having desired phase variation. Disclosed event detection circuitry can be used to generate event timing data representing one or more phase variations in detected events. The disclosed signal generation embodiments can utilize the event timing data to playback detect events along with the measured phase variations. Further, the signal generation circuitry and the event detection circuitry can be implemented in different devices or can be implemented in the same device.

Systems and methods for playback of detected timing events

In response to communications from a first device to a second device, respective phase differences are estimated between a first clock of the first device and a second clock of the second device. A first average phase difference is computed within a percentile of a first subset of the respective phase differences. The percentile is less than 100. A second average phase difference is computed within the percentile of a second subset of the respective phase differences. The second subset is a modification of the first subset. The second average phase difference is computed in response to the first average phase difference and the modification.

Method, system and computer program product for measuring a communication from a first device to a second device

Systems and methods are disclosed for precise event time measurement. High speed serializer and deserializer circuitry are combined with high speed logic elements, such as exclusive-OR (XOR) or exclusive-not-OR (XNOR) logic circuitry, to achieve a measurement precision based upon a bit period associated with the high speed circuitry rather than upon slower reference clock signals. In certain embodiments, the disclosed systems and methods generate digital signal patterns, serialize them, transmit them as a high speed bit stream, utilize an event occurrence signal and logic circuitry to produce a modified bit stream, deserialize the modified bit stream to produce a modified digital signal pattern, compare the modified signal pattern with a predicted signal pattern, and determine bit positions or bit periods at which events occur based upon this comparison. These bit positions can then be used to generate precise timestamps and related time information for detected events.

Systems and methods for precise event timing measurements

Systems and methods are disclosed for precise event time measurement using high-speed deserializer circuitry. The described embodiments utilize high speed deserializer circuitry to achieve a precision based upon a bit period associated with the operation of the high speed operation of the deserializer circuitry rather than upon slower speed clock periods associated with reference clock signals. In certain embodiments, the disclosed systems and methods receive an event occurrence signal and use deserializer circuitry to sample the event occurrence signal and to produce multi-bit parallel data representing the event occurrence signal. Precise timestamps can then be generated based upon the multi-bit parallel data. Advantageously, the precision of these time measurements is associated with the bit period of the high speed operation of the deserializer circuitry and are not limited to lower speeds at which other circuitry within the system may be operating, for example, based upon a slower reference clock signal.

Systems and methods for precise timing measurements using high-speed deserializers

Systems and methods are disclosed for in-line removal of duplicate network packets in network packet streams operating at high speeds (e.g., 1-10 Gbps and above). A hash generator applies at least one hash algorithm to incoming packets to form one or more different hash values. The packet deduplication systems and methods then use the one or more hash values for each incoming packet to identify data stored for previously received backs and use the identified data to determine if incoming packets are duplicate packets. Duplicate packets are then removed from the output packet stream thereby reducing duplicate packets for downstream processing. A deduplication window can further be utilized to limit the amount of data stored for previous packets based upon one or more parameters, such as an amount of time that has passed and/or a number of packets for which data has been stored. These parameters can also be selected, configured and/or adjusted to achieve desired operational objectives.

Growing community of inventors

Austin, TX, United States of America

Charles Albert Webb, Iii