Taiwan Semiconductor Manufacturing Comp. Ltd.

Chao Yuan Cheng

Yangsyu Lin

Chien-Chi Tien

Po-Sheng Wang

An integrated circuit includes a first active region of a first set of transistors of a first type, a second active region of a second set of transistors of the first type, a third active region of a third set of transistors of the first type, a fourth active region of a fourth set of transistors of the first type and a fifth active region of a fifth set of transistors of a second type. The first, second, fourth and fifth active region have a first width in a second direction, and are on a first level. The third active region is on the first level, and has a second width different from the first width. The second active region is adjacent to the first boundary, and is separated from the first active region in the second direction. The fourth active region is adjacent to the second boundary.

Integrated circuit and method of forming same

A method of forming an integrated circuit includes placing a first cell layout design of the integrated circuit on a layout design, and manufacturing the integrated circuit based on the layout design. Placing the first cell layout design includes placing a first active region layout pattern adjacent to a first cell boundary, placing a second active region layout pattern adjacent to a second cell boundary, and placing a first set of active region layout patterns between the first and second active region layout patterns, according to a first set of guidelines. The first set of guidelines includes selecting transistors of a first type with a first driving strength and transistors of a second type with a second driving strength. In some embodiments, the first, second and first set of active region layout patterns extend in the first direction, and are on a first layout level.

Growing community of inventors

Hsinchu, Taiwan

Chao Yuan Cheng