Mediatek Corporation

Chao-Yi Wu

Li-Lien Lin

Li-Chun Tu

Chien-Chung Wu

Ping-Sheng Chen

Hsin-Cheng Chen

Yao-Chun Fang

Chia-Hung Lee

Ching-Hao Yu

The invention provides a nonvolatile memory controller. In one embodiment, the nonvolatile memory controller receives new data for writing a nonvolatile memory from a host, and comprises a signature calculating circuit, a signature buffer, a signature comparison circuit, a data comparison circuit, and a nonvolatile memory interface circuit. The signature calculating circuit calculates a first signature according to the new data. The signature buffer outputs a second signature corresponding to old data stored in the nonvolatile memory, wherein the old data has the same logical address as that of the new data. The signature comparison circuit determines whether the first signature is identical to the second signature. The nonvolatile memory interface circuit writes the new data to the nonvolatile memory when the first signature is determined to be different from the second signature by the signature comparison circuit.

Nonvolatile memory controller and method for writing data to nonvolatile memory

The invention provides a method for data recording of an optical disk drive. First, raw data is encoded to obtain a plurality of recording units of encoded data to be stored in a memory. The encoded data stored in the memory is then recorded to an optical disk. A predetermined number of recording units of the encoded data is then reserved in the memory as reserved data without being recorded onto the optical disk. The recorded data read from the optical disk is then compared to the corresponding encoded data stored in the memory to verify correctness of the recorded data. The reserved data is then recorded to the optical disk after correctness verification of the recorded data is completed. Finally, the aforementioned steps are repeated until there is no more raw data left as a source for encoding.

Optical disk drive and method for data recording of optical disk drives

A multi-channel memory apparatus is provided. The multi-channel memory apparatus includes a host interface, storage channels, an error correcting module, and a multiple memory access module. The host interface is arranged to receive and transmit data from and to a host device. Each storage channel is coupled to a memory device for storing the data. The error correcting module is shared by the storage channels, includes an error correction code engine and a data buffer, and is arranged to perform error correction code encoding on the data to be stored into the memory devices and perform error correction code decoding on the data read out from the memory devices. The multiple memory access module is coupled between the storage channels and the error correcting module and arranged to perform multiple access control of the storage channels for the error correcting module.

Multi-channel memory apparatus and method thereof

One exemplary storage controller of controlling data access of a storage device includes an encoding circuit and a control circuit. The encoding circuit is programmable to support a plurality of different finite fields, and implemented for generating encoded data according to an adjustable finite field setting. The control circuit is implemented for controlling the adjustable finite field setting of the encoding circuit and recording data into the storage device according to the encoded data. Another exemplary storage controller of controlling data access of a storage device includes a decoding circuit and a control circuit. The decoding circuit is programmable to support a plurality of different finite fields, and implemented for generating decoded data according to an adjustable finite field setting. The control circuit is implemented for reading data from the storage device to obtain readout data and controlling the adjustable finite field setting of the decoding circuit.

Growing community of inventors

Kaohsiung County, Taiwan

Chao-Yi Wu